Algorithmic Strategies for FPGA-based Vision


Book Description

As demands for real-time computer vision applications increase, implementations on alternative architectures have been explored. These architectures include Field-Programmable Gate Arrays (FPGAs), which offer a high degree of flexibility and parallelism. A problem with this is that many computer vision algorithms have been optimized for serial processing, and this often does not map well to FPGA implementation.This thesis introduces the concept of FPGA-tailored computer vision algorithms, particularly on a stream processing mode. Case studies on FPGA implementations of standard corner detections (Harris, FAST and SUSAN) were carried out and analyzed to highlight the differences between hardware and software. Through this analysis, it was observed that an efficient software algorithm may not retain its speed advantage in the hardware domain. In fact, algorithms that are slower in software, can achieve comparable or faster performance in the hardware domain with the appropriate implementation compared to algorithms optimized for serial processing. Other observations include the optimization goals for FPGA implementation, the opportunities present in FPGAs that can be exploited, and properties of algorithms that are suitable and unsuitable for FPGA implementation. The outcome is a set of guidelines and principles for an FPGA-tailored algorithm.This information is then used in the design of a face detection algorithm optimized for FPGA implementation. This algorithm was deliberately designed to use operations suitable for FPGAs, based on the insights gained from the corner detection case studies. The result is a face detection algorithm that is unattractive as a software implementation, but is a reasonable choice as an FPGA implementation. The FPGA implementation of this algorithm achieves high theoretical framerates, and is implementable on a low-cost, low-end FPGA development board. This implementation is also competitive with FPGA implementations of the software-optimized Viola-Jones algorithm, especially on lower-end devices.




Design for Embedded Image Processing on FPGAs


Book Description

Design for Embedded Image Processing on FPGAs Bridge the gap between software and hardware with this foundational design reference Field-programmable gate arrays (FPGAs) are integrated circuits designed so that configuration can take place. Circuits of this kind play an integral role in processing images, with FPGAs increasingly embedded in digital cameras and other devices that produce visual data outputs for subsequent realization and compression. These uses of FPGAs require specific design processes designed to mediate smoothly between hardware and processing algorithm. Design for Embedded Image Processing on FPGAs provides a comprehensive overview of these processes and their applications in embedded image processing. Beginning with an overview of image processing and its core principles, this book discusses specific design and computation techniques, with a smooth progression from the foundations of the field to its advanced principles. Readers of the second edition of Design for Embedded Image Processing on FPGAs will also find: Detailed discussion of image processing techniques including point operations, histogram operations, linear transformations, and more New chapters covering Deep Learning algorithms and Image and Video Coding Example applications throughout to ground principles and demonstrate techniques Design for Embedded Image Processing on FPGAs is ideal for engineers and academics working in the field of Image Processing, as well as graduate students studying Embedded Systems Engineering, Image Processing, Digital Design, and related fields.




Architectures for Computer Vision


Book Description

This book provides comprehensive coverage of 3D vision systems, from vision models and state-of-the-art algorithms to their hardware architectures for implementation on DSPs, FPGA and ASIC chips, and GPUs. It aims to fill the gaps between computer vision algorithms and real-time digital circuit implementations, especially with Verilog HDL design. The organization of this book is vision and hardware module directed, based on Verilog vision modules, 3D vision modules, parallel vision architectures, and Verilog designs for the stereo matching system with various parallel architectures. Provides Verilog vision simulators, tailored to the design and testing of general vision chips Bridges the differences between C/C++ and HDL to encompass both software realization and chip implementation; includes numerous examples that realize vision algorithms and general vision processing in HDL Unique in providing an organized and complete overview of how a real-time 3D vision system-on-chip can be designed Focuses on the digital VLSI aspects and implementation of digital signal processing tasks on hardware platforms such as ASICs and FPGAs for 3D vision systems, which have not been comprehensively covered in one single book Provides a timely view of the pervasive use of vision systems and the challenges of fusing information from different vision modules Accompanying website includes software and HDL code packages to enhance further learning and develop advanced systems A solution set and lecture slides are provided on the book's companion website The book is aimed at graduate students and researchers in computer vision and embedded systems, as well as chip and FPGA designers. Senior undergraduate students specializing in VLSI design or computer vision will also find the book to be helpful in understanding advanced applications.




Field Programmable Gate Arrays Implementation of Computer Vision Algorithm


Book Description

Computer vision algorithms, which play an significant role in vision processing, is widely applied in many aspects such as geology survey, traffic management and medical care, etc.. Most of the situations require the process to be real-timed, in other words, as fast as possible. Field Programmable Gate Arrays (FPGAs) have a advantage of parallelism fabric in programming, comparing to the serial communications of CPUs, which makes FPGA a perfect platform for implementing vision algorithms. These algorithms usually have a very high computation power because the objects, a large amount of pixels of a single picture, have to be proceeded not once, but many times. This project reconfigured onto the FPGA board, Terasic DE2i-150, a partial of a algorithm that has multiplexing computations. The algorithm of Harris corner detection is chosen, which contains an important step in many vision processing and is of good performance. The reconfiguration of the most time-consuming portion has synthesized onto the board and a result is presented to demonstrate the performance and the capacity of the FPGA. It shows that even a low-cost FPGA in 50MHz can achieve a faster speed than that of some CPUs due to the parallelism, which is the specialization of FPGAs and is unfeasible to apply to software.




Performance Evaluation of Vision Algorithms on FPGA


Book Description

The modern FPGAs enable system designers to develop high-performance computing (HPC) applications with a large amount of parallelism. Real-time image processing is such a requirement that demands much more processing power than a conventional processor can deliver. In this research, we implemented software and hardware based architectures on FPGA to achieve real-time image processing. Furthermore, we benchmark and compare our implemented architectures with existing architectures. The operational structures of those systems consist of on-chip processors or custom vision coprocessors implemented in a parallel manner with efficient memory and bus architectures. The performance properties such as the accuracy, throughput and efficiency are measured and presented. According to results, FPGA implementations are faster than the DSP and GPP implementations for algorithms which can exploit a large amount of parallelism. Our image pre-processing architecture is nearly two times faster than the optimized software implementation on an Intel Core 2 Duo GPP. However, because of the higher clock frequency of DSPs/GPPs, the processing speed for sequential computations on on-chip processors in FPGAs is slower than on DSPs/GPPs. These on-chip processors are well suited for multi-processor systems for software level parallelism. Our quad-Microblaze architecture achieved 75-80% performance improvement compared to its single Microblaze counterpart. Moreover, the quad-Microblaze design is faster than the single-powerPC implementation on FPFA. Therefore, multi-processor architecture with customised coprocessors are effective for implementing custom parallel architecture to achieve real time image processing.




Design for Embedded Image Processing on FPGAs


Book Description

Dr Donald Bailey starts with introductory material considering the problem of embedded image processing, and how some of the issues may be solved using parallel hardware solutions. Field programmable gate arrays (FPGAs) are introduced as a technology that provides flexible, fine-grained hardware that can readily exploit parallelism within many image processing algorithms. A brief review of FPGA programming languages provides the link between a software mindset normally associated with image processing algorithms, and the hardware mindset required for efficient utilization of a parallel hardware design. The design process for implementing an image processing algorithm on an FPGA is compared with that for a conventional software implementation, with the key differences highlighted. Particular attention is given to the techniques for mapping an algorithm onto an FPGA implementation, considering timing, memory bandwidth and resource constraints, and efficient hardware computational techniques. Extensive coverage is given of a range of low and intermediate level image processing operations, discussing efficient implementations and how these may vary according to the application. The techniques are illustrated with several example applications or case studies from projects or applications he has been involved with. Issues such as interfacing between the FPGA and peripheral devices are covered briefly, as is designing the system in such a way that it can be more readily debugged and tuned. Provides a bridge between algorithms and hardware Demonstrates how to avoid many of the potential pitfalls Offers practical recommendations and solutions Illustrates several real-world applications and case studies Allows those with software backgrounds to understand efficient hardware implementation Design for Embedded Image Processing on FPGAs is ideal for researchers and engineers in the vision or image processing industry, who are looking at smart sensors, machine vision, and robotic vision, as well as FPGA developers and application engineers. The book can also be used by graduate students studying imaging systems, computer engineering, digital design, circuit design, or computer science. It can also be used as supplementary text for courses in advanced digital design, algorithm and hardware implementation, and digital signal processing and applications. Companion website for the book: www.wiley.com/go/bailey/fpga




Advanced Concepts for Intelligent Vision Systems


Book Description

This book constitutes the refereed proceedings of the 13th International Conference on Advanced Concepts for Intelligent Vision Systems, ACIVS 2011, held in Ghent, Belgium, in August 2011. The 66 revised full papers presented were carefully reviewed and selected from 124 submissions. The papers are organized in topical sections on classification recognition, and tracking, segmentation, images analysis, image processing, video surveillance and biometrics, algorithms and optimization; and 3D, depth and scene understanding.




Advances in Theory and Applications of Stereo Vision


Book Description

The book presents a wide range of innovative research ideas and current trends in stereo vision. The topics covered in this book encapsulate research trends from fundamental theoretical aspects of robust stereo correspondence estimation to the establishment of novel and robust algorithms as well as applications in a wide range of disciplines. Particularly interesting theoretical trends presented in this book involve the exploitation of the evolutionary approach, wavelets and multiwavelet theories, Markov random fields and fuzzy sets in addressing the correspondence estimation problem. Novel algorithms utilizing inspiration from biological systems (such as the silicon retina imager and fish eye) and nature (through the exploitation of the refractive index of liquids) make this book an interesting compilation of current research ideas.







International Conference on Cognitive based Information Processing and Applications (CIPA 2021)


Book Description

This book contains papers presented at the International Conference on Cognitive based Information Processing and Applications (CIPA) held during August 21, 2021, online conference (since COVID 19), which is divided into a 2-volume book. The papers in the second volume represent the various technological advancements in network information processing, graphics and image processing, medical care, machine learning, smart cities. It caters to postgraduate students, researchers, and practitioners specializing and working in the area of cognitive-inspired computing and information processing.