Book Description

This book constitutes the refereed proceedings of the 5th International Workshop on Cryptographic Hardware and Embedded Systems, CHES 2003, held in Cologne, Germany in September 2003. The 32 revised full papers presented were carefully reviewed and selected from 111 submissions. The papers are organized in topical sections on side channel attack methodology, hardware factorization, symmetric cypher attacks and countermeasures, secure hardware logic, random number generators, efficient multiplication, efficient arithmetics, attacks on asymmetric cryptosystems, implementation of symmetric cyphers, hyperelliptic curve cryptography, countermeasures to side channel leakage, and security of standards.