Dark Silicon and Future On-chip Systems


Book Description

Dark Silicon and the Future of On-chip Systems, Volume 110, the latest release in the Advances in Computers series published since 1960, presents detailed coverage of innovations in computer hardware, software, theory, design and applications, with this release focusing on an Introduction to dark silicon and future processors, a Revisiting of processor allocation and application mapping in future CMPs in the dark silicon era, Multi-objectivism in the dark silicon age, Dark silicon aware resource management for many-core systems, Dynamic power management for dark silicon multi-core processors, Topology specialization for networks-on-chip in the dark silicon era, and Emerging SRAM-based FPGA architectures. - Provides in-depth surveys and tutorials on new computer technology - Covers well-known authors and researchers in the field - Presents extensive bibliographies with most chapters - Includes volumes that are devoted to single themes or subfields of computer science, with this release focusing on Dark Silicon and Future On-chip Systems




The Dark Side of Silicon


Book Description

This book presents the state-of-the art of one of the main concerns with microprocessors today, a phenomenon known as "dark silicon". Readers will learn how power constraints (both leakage and dynamic power) limit the extent to which large portions of a chip can be powered up at a given time, i.e. how much actual performance and functionality the microprocessor can provide. The authors describe their research toward the future of microprocessor development in the dark silicon era, covering a variety of important aspects of dark silicon-aware architectures including design, management, reliability, and test. Readers will benefit from specific recommendations for mitigating the dark silicon phenomenon, including energy-efficient, dedicated solutions and technologies to maximize the utilization and reliability of microprocessors.




Towards Heterogeneous Multi-core Systems-on-Chip for Edge Machine Learning


Book Description

This book explores and motivates the need for building homogeneous and heterogeneous multi-core systems for machine learning to enable flexibility and energy-efficiency. Coverage focuses on a key aspect of the challenges of (extreme-)edge-computing, i.e., design of energy-efficient and flexible hardware architectures, and hardware-software co-optimization strategies to enable early design space exploration of hardware architectures. The authors investigate possible design solutions for building single-core specialized hardware accelerators for machine learning and motivates the need for building homogeneous and heterogeneous multi-core systems to enable flexibility and energy-efficiency. The advantages of scaling to heterogeneous multi-core systems are shown through the implementation of multiple test chips and architectural optimizations.




Energy Efficient Embedded Video Processing Systems


Book Description

This book provides its readers with the means to implement energy-efficient video systems, by using different optimization approaches at multiple abstraction levels. The authors evaluate the complete video system with a motive to optimize its different software and hardware components in synergy, increase the throughput-per-watt, and address reliability issues. Subsequently, this book provides algorithmic and architectural enhancements, best practices and deployment models for new video systems, while considering new implementation paradigms of hardware accelerators, parallelism for heterogeneous multi- and many-core systems, and systems with long life-cycles. Particular emphasis is given to the current video encoding industry standard H.264/AVC, and one of the latest video encoders (High Efficiency Video Coding, HEVC).




Transforming Reconfigurable Systems: A Festschrift Celebrating The 60th Birthday Of Professor Peter Cheung


Book Description

Over the last three decades, Professor Peter Cheung has made significant contributions to a variety of areas, such as analogue and digital computer-aided design tools, high-level synthesis and hardware/software codesign, low-power and high-performance circuit architectures for signal and image processing, and mixed-signal integrated-circuit design.However, the area that has attracted his greatest attention is reconfigurable systems and their design, and his work has contributed to the transformation of this important and exciting discipline. This festschrift contains a unique collection of technical papers based on presentations at a workshop at Imperial College London in May 2013 celebrating Professor Cheung's 60th birthday. Renowned researchers who have been inspired and motivated by his outstanding research in the area of reconfigurable systems are brought together from across the globe to offer their latest research in reconfigurable systems. Professor Cheung has devoted much of his professional career to Imperial College London, and has served with distinction as the Head of Department of Electrical and Electronic Engineering for several years. His outstanding capability and his loyalty to Imperial College and the Department of Electrical and Electronic Engineering are legendary. Professor Cheung has made tremendous strides in ensuring excellence in both research and teaching, and in establishing sound governance and strong financial endowment; but above all, he has made his department a wonderful place in which to work and study.




Circadian Rhythms for Future Resilient Electronic Systems


Book Description

This book describes methods to address wearout/aging degradations in electronic chips and systems, caused by several physical mechanisms at the device level. The authors introduce a novel technique called accelerated active self-healing, which fixes wearout issues by enabling accelerated recovery. Coverage includes recovery theory, experimental results, implementations and applications, across multiple nodes ranging from planar, FD-SOI to FinFET, based on both foundry provided models and predictive models. Presents novel techniques, tested with experiments on real hardware; Discusses circuit and system level wearout recovery implementations, many of these designs are portable and friendly to the standard design flow; Provides circuit-architecture-system infrastructures that enable the accelerated self-healing for future resilient systems; Discusses wearout issues at both transistor and interconnect level, providing solutions that apply to both; Includes coverage of resilient aspects of emerging applications such as IoT.




Large Scale Network-Centric Distributed Systems


Book Description

A highly accessible reference offering a broad range of topics and insights on large scale network-centric distributed systems Evolving from the fields of high-performance computing and networking, large scale network-centric distributed systems continues to grow as one of the most important topics in computing and communication and many interdisciplinary areas. Dealing with both wired and wireless networks, this book focuses on the design and performance issues of such systems. Large Scale Network-Centric Distributed Systems provides in-depth coverage ranging from ground-level hardware issues (such as buffer organization, router delay, and flow control) to the high-level issues immediately concerning application or system users (including parallel programming, middleware, and OS support for such computing systems). Arranged in five parts, it explains and analyzes complex topics to an unprecedented degree: Part 1: Multicore and Many-Core (Mc) Systems-on-Chip Part 2: Pervasive/Ubiquitous Computing and Peer-to-Peer Systems Part 3: Wireless/Mobile Networks Part 4: Grid and Cloud Computing Part 5: Other Topics Related to Network-Centric Computing and Its Applications Large Scale Network-Centric Distributed Systems is an incredibly useful resource for practitioners, postgraduate students, postdocs, and researchers.




Embedded System Technology


Book Description

This book constitutes the refereed proceedings of the 13th National Conference on Embedded System Technology, ESTC 2015, held in Beijing, China, in October 2015. The 18 revised full papers presented were carefully reviewed and selected from 63 papers. The topics cover a broad range of fields focusing on research about embedded system technologies, such as smart hardware, system and network, applications and algorithm.




Photonic Interconnects for Computing Systems


Book Description

In recent years, there has been a considerable amount of effort, both in industry and academia, focusing on the design, implementation, performance analysis, evaluation and prediction of silicon photonic interconnects for inter- and intra-chip communication, paving the way for the design and dimensioning of the next and future generation of high-performance computing systems. Photonic Interconnects for Computing Systems provides a comprehensive overview of the current state-of-the-art technology and research achievements in employing silicon photonics for interconnection networks and high-performance computing, summarizing main opportunities and some challenges. The majority of the chapters were collected from presentations made at the International Workshop on Optical/Photonic Interconnects for Computing Systems (OPTICS) held over the past two years. The workshop invites internationally recognized speakers on the range of topics relevant to silicon photonics and computing systems. Technical topics discussed in the book include:Design and Implementation of Chip-Scale Photonic Interconnects;Developing Design Automation Solutions for Chip-Scale Photonic Interconnects;Design Space Exploration in Chip-Scale Photonic Interconnects;Thermal Analysis and Modeling in Photonic Interconnects;Design for Reliability;Fabrication Non-Uniformity in Photonic Interconnects;Photonic Interconnects for Computing Systems presents a compilation of outstanding contributions from leading research groups in the field. It presents a comprehensive overview of the design, advantages, challenges, and requirements of photonic interconnects for computing systems. The selected contributions present important discussions and approaches related to the design and development of novel photonic interconnect architectures, as well as various design solutions to improve the performance of such systems while considering different challenges. The book is ideal for personnel in computer/photonic industries as well as academic staff and master/graduate students in computer science and engineering, electronic engineering, electrical engineering and photonics.




Multi-Processor System-on-Chip 2


Book Description

A Multi-Processor System-on-Chip (MPSoC) is the key component for complex applications. These applications put huge pressure on memory, communication devices and computing units. This book, presented in two volumes – Architectures and Applications – therefore celebrates the 20th anniversary of MPSoC, an interdisciplinary forum that focuses on multi-core and multi-processor hardware and software systems. It is this interdisciplinarity which has led to MPSoC bringing together experts in these fields from around the world, over the last two decades. Multi-Processor System-on-Chip 2 covers application-specific MPSoC design, including compilers and architecture exploration. This second volume describes optimization methods, tools to optimize and port specific applications on MPSoC architectures. Details on compilation, power consumption and wireless communication are also presented, as well as examples of modeling frameworks and CAD tools. Explanations of specific platforms for automotive and real-time computing are also included.