Prevention of Hot Spots in Packet-switched Multistage Interconnection Networks


Book Description

Under the existing schemes, the network exhibits a reasonable performance only when the hot access rate is not very high, but severe congestion result when the hot access rate is high. By contrast, under our scheme the network has virtually no performance loss for a moderate hot access rate, and a slightly degraded, yet sustained, network performance results when the hot access rate is very high."




Proceedings, ICPADS'92


Book Description







Architecture and Protocols for High-Speed Networks


Book Description

Multimedia data streams will form a major part of the new generation of applications in high-speed networks. Continuous media streams, however, require transmission with guaranteed performance. In addition, many multimedia applications will require peer-to-multipeer communication. Guaranteed performance can only be provided with resource reservation in the network, and efficient multipeer communication must be based on multicast support in the lower layers of the network. Architecture and Protocols for High-Speed Networks focuses on techniques for building the networks that will meet the needs of these multimedia applications. In particular two areas of current research interest in such communication systems are covered in depth. These are the protocol related aspects, such as switched networks, ATM, MAC layer, network and transport layer; and the services and applications. Architecture and Protocols for High-Speed Networks contains contributions from leading world experts, giving the most up-to-date research available. It is an essential reference for all professionals, engineers and researchers working in the area of high-speed networks.




High Performance Embedded Architectures and Compilers


Book Description

As Chairmen of HiPEAC 2005, we have the pleasure of welcoming you to the proceedings of the ?rst international conference promoted by the HiPEAC N- work of Excellence. During the last year, HiPEAC has been building its clusters of researchers in computer architecture and advanced compiler techniques for embedded and high-performance computers. Recently, the Summer School has been the seed for a fruitful collaboration of renowned international faculty and young researchers from 23 countries with fresh new ideas. Now, the conference promises to be among the premier forums for discussion and debate on these research topics. Theprestigeofasymposiumismainlydeterminedbythequalityofitstech- cal program. This ?rst programlived up to our high expectations, thanks to the largenumber of strong submissions. The ProgramCommittee received a total of 84 submissions; only 17 were selected for presentation as full-length papers and another one as an invited paper. Each paper was rigorously reviewed by three ProgramCommittee members and at least one external referee. Many reviewers spent a great amount of e?ort to provide detailed feedback. In many cases, such feedback along with constructive shepherding resulted in dramatic improvement in the quality of accepted papers. The names of the Program Committee m- bers and the referees are listed in the proceedings. The net result of this team e?ort is that the symposium proceedings include outstanding contributions by authors from nine countries in three continents. In addition to paper presentations, this ?rst HiPEAC conference featured two keynotes delivered by prominent researchers from industry and academia.




Innovative Algorithms and Techniques in Automation, Industrial Electronics and Telecommunications


Book Description

This book includes a set of rigorously reviewed world-class manuscripts addressing and detailing state-of-the-art research projects in the areas of Industrial Electronics, Technology, Automation, Telecommunications and Networking. The book includes selected papers from the conference proceedings of the International Conference on Industrial Electronics, Technology, Automation (IETA 2006) and International Conference on Telecommunications and Networking (TeNe 06).




The Network Designer's Handbook


Book Description

The Network Designer's Handbook will help anyone trapped between limited bandwidth, fault-intolerant computer buses and expensive, over-engineered telecommunications technology. It will help anyone looking for new cost-effective ways to build LAN switches, RAID systems, multimedia servers or multiprocessors. It will help the small company looking for an edge to break into the market, and the large one looking for ways to improve its margins and boost its market share. This handbook, the result of over six man-years of effort at the PACT Research Institute, provides solid engineering data for the computer systems professional. Four cpu-months of system simulation are summarised in an easy-to-read form, allowing the consequences of different design decisions to be simply compared. The Network Designer's Handbook explains the principles of the new generation of small-scale low-buffer serial interconnects. Using the specific example of IEEE 1355-1995 links and the STC104 high-valency switch chip it shows how this technology can provide modular, fault-tolerant and scalable interconnect. The picture is rounded out with descriptions of network topologies, case studies and many practical tips.







Proceedings


Book Description




ICPP 2006


Book Description

Workshop on Web Services-based Grid Applications (WSGA) -- Workshop on Parallel and Distributed Multimedia (PDM), the Workshop on Wireless and Sensor Networks (WSNet) -- 3rd International Workshop on Embedded Computing (EC-06) -- Workshop on Performance Evaluation of Networks for Parallel, Cluster and Grid Computing Systems (PEN-PCGCS) -- the 5th Workshop on Compile and Runtime Techniques for Parallel Computing, (CRTPC) -- 8th Workshop on High Performance Scientific and Engineering Computing (HPSEC-06)