CMOSETR 2015 Vol. 2: Circuit Advances & Emerging Technologies Track


Book Description

Presentation slides for the Circuit Advances & Emerging Technologies track at the CMOSETR 2015 conference, May 20-22, 2015.




Beyond-CMOS Technologies for Next Generation Computer Design


Book Description

This book describes the bottleneck faced soon by designers of traditional CMOS devices, due to device scaling, power and energy consumption, and variability limitations. This book aims at bridging the gap between device technology and architecture/system design. Readers will learn about challenges and opportunities presented by “beyond-CMOS devices” and gain insight into how these might be leveraged to build energy-efficient electronic systems.




Parallel Processing and Applied Mathematics


Book Description

The two-volume set LNCS 10777 and 10778 constitutes revised selected papers from the 12th International Conference on Parallel Processing and Applied Mathematics, PPAM 2017, held in Lublin, Poland, in September 2017. The 49 regular papers presented in the proceedings were selected from 98 submissions. For the workshops and special sessions, that were held as integral parts of the PPAM 2017 conference, a total of 51 papers was accepted from 75 submissions. The papers were organized in topical sections named as follows: Part I: numerical algorithms and parallel scientific computing; particle methods in simulations; task-based paradigm of parallel computing; GPU computing; parallel non-numerical algorithms; performance evaluation of parallel algorithms and applications; environments and frameworks for parallel/distributed/cloud computing; applications of parallel computing; soft computing with applications; and special session on parallel matrix factorizations. Part II: workshop on models, algorithms and methodologies for hybrid parallelism in new HPC systems; workshop power and energy aspects of computations (PEAC 2017); workshop on scheduling for parallel computing (SPC 2017); workshop on language-based parallel programming models (WLPP 2017); workshop on PGAS programming; minisymposium on HPC applications in physical sciences; minisymposium on high performance computing interval methods; workshop on complex collective systems.




Device Circuit Co-Design Issues in FETs


Book Description

This book provides an overview of emerging semiconductor devices and their applications in electronic circuits, which form the foundation of electronic devices. Device Circuit Co-Design Issues in FETs provides readers with a better understanding of the ever-growing field of low-power electronic devices and their applications in the wireless, biosensing, and circuit domains. The book brings researchers and engineers from various disciplines of the VLSI domain together to tackle the emerging challenges in the field of engineering and applications of advanced low-power devices in an effort to improve the performance of these technologies. The chapters examine the challenges and scope of FinFET device circuits, 3D FETs, and advanced FET for circuit applications. The book also discusses low-power memory design, neuromorphic computing, and issues related to thermal reliability. The authors provide a good understanding of device physics and circuits, and discuss transistors based on the new channel/dielectric materials and device architectures to achieve low-power dissipation and ultra-high switching speeds to fulfill the requirements of the semiconductor industry. This book is intended for students, researchers, and professionals in the field of semiconductor devices and nanodevices, as well as those working on device-circuit co-design issues.







Hybrid ADCs, Smart Sensors for the IoT, and Sub-1V & Advanced Node Analog Circuit Design


Book Description

This book is based on the 18 tutorials presented during the 26th workshop on Advances in Analog Circuit Design. Expert designers present readers with information about a variety of topics at the frontier of analog circuit design, with specific contributions focusing on hybrid ADCs, smart sensors for the IoT, sub-1V and advanced-node analog circuit design. This book serves as a valuable reference to the state-of-the-art, for anyone involved in analog circuit research and development.




Mitigating Process Variability and Soft Errors at Circuit-Level for FinFETs


Book Description

This book evaluates the influence of process variations (e.g. work-function fluctuations) and radiation-induced soft errors in a set of logic cells using FinFET technology, considering the 7nm technological node as a case study. Moreover, for accurate soft error estimation, the authors adopt a radiation event generator tool (MUSCA SEP3), which deals both with layout features and electrical properties of devices. The authors also explore four circuit-level techniques (e.g. transistor reordering, decoupling cells, Schmitt Trigger, and sleep transistor) as alternatives to attenuate the unwanted effects on FinFET logic cells. This book also evaluates the mitigation tendency when different levels of process variation, transistor sizing, and radiation particle characteristics are applied in the design. An overall comparison of all methods addressed by this work is provided allowing to trace a trade-off between the reliability gains and the design penalties of each approach regarding the area, performance, power consumption, single event transient (SET) pulse width, and SET cross-section.







3D Interconnect Architectures for Heterogeneous Technologies


Book Description

This book describes the first comprehensive approach to the optimization of interconnect architectures in 3D systems on chips (SoCs), specially addressing the challenges and opportunities arising from heterogeneous integration. Readers learn about the physical implications of using heterogeneous 3D technologies for SoC integration, while also learning to maximize the 3D-technology gains, through a physical-effect-aware architecture design. The book provides a deep theoretical background covering all abstraction-levels needed to research and architect tomorrow’s 3D-integrated circuits, an extensive set of optimization methods (for power, performance, area, and yield), as well as an open-source optimization and simulation framework for fast exploration of novel designs.




Millimeter-Wave Integrated Circuits


Book Description

This peer-reviewed book explores the methodologies that are used for effective research, design and innovation in the vast field of millimeter-wave circuits, and describes how these have to be modified to fit the uniqueness of high-frequency nanoelectronics design. Each chapter focuses on a specific research challenge related to either small form factors or higher operating frequencies. The book first examines nanodevice scaling and the emerging electronic design automation tools that can be used in millimeter-wave research, as well as the singular challenges of combining deep-submicron and millimeter-wave design. It also demonstrates the importance of considering, in the millimeter-wave context, system-level design leading to differing packaging options. Further, it presents integrated circuit design methodologies for all major transceiver blocks typically employed at millimeter-wave frequencies, as these methodologies are normally fundamentally different from the traditional design methodologies used in analogue and lower-frequency electronics. Lastly, the book discusses the methodologies of millimeter-wave research and design for extreme or harsh environments, rebooting electronics, the additional opportunities for terahertz research, and the main differences between the approaches taken in millimeter-wave research and terahertz research.