Mems Packaging


Book Description

MEMS sensors and actuators are enabling components for smartphones, AR/VR, and wearable electronics. MEMS packaging is recognized as one of the most critical activities to design and manufacture reliable MEMS. A unique challenge to MEMS packaging is how to protect moving MEMS devices during manufacturing and operation. With the introduction of wafer level capping and encapsulation processes, this barrier is removed successfully. In addition, MEMS devices should be integrated with their electronic chips with the smallest footprint possible. As a result, 3D packaging is applied to connect the devices vertically for the most effective integration. Such 3D packaging also paves the way for further heterogenous integration of MEMS devices, electronics, and other functional devices.This book consists of chapters written by leaders developing products in a MEMS industrial setting and faculty members conducting research in an academic setting. After an introduction chapter, the practical issues are covered: through-silicon vias (TSVs), vertical interconnects, wafer level packaging, motion sensor-to-CMOS bonding, and use of printed circuit board technology to fabricate MEMS. These chapters are written by leaders developing MEMS products. Then, fundamental issues are discussed, topics including encapsulation of MEMS, heterogenous integration, microfluidics, solder bonding, localized sealing, microsprings, and reliability.




Advanced MEMS Packaging


Book Description

A comprehensive guide to 3D MEMS packaging methods and solutions Written by experts in the field, Advanced MEMS Packaging serves as a valuable reference for those faced with the challenges created by the ever-increasing interest in MEMS devices and packaging. This authoritative guide presents cutting-edge MEMS (microelectromechanical systems) packaging techniques, such as low-temperature C2W and W2W bonding and 3D packaging. This definitive resource helps you select reliable, creative, high-performance, robust, and cost-effective packaging techniques for MEMS devices. The book will also aid in stimulating further research and development in electrical, optical, mechanical, and thermal designs as well as materials, processes, manufacturing, testing, and reliability. Among the topics explored: Advanced IC and MEMS packaging trends MEMS devices, commercial applications, and markets More than 360 MEMS packaging patents and 10 3D MEMS packaging designs TSV for 3D MEMS packaging MEMS wafer thinning, dicing, and handling Low-temperature C2C, C2W, and W2W bonding Reliability of RoHS-compliant MEMS packaging Micromachining and water bonding techniques Actuation mechanisms and integrated micromachining Bubble switch, optical switch, and VOA MEMS packaging Bolometer and accelerameter MEMS packaging Bio-MEMS and biosensor MEMS packaging RF MEMS switches, tunable circuits, and packaging




Hermeticity Testing of MEMS and Microelectronic Packages


Book Description

Packaging of microelectronics has been developing since the invention of the transistor in 1947. With the increasing complexity and decreasing size of the die, packaging requirements have continued to change. A step change in package requirements came with the introduction of the Micro-Electro-Mechanical System (MEMS) whereby interactions with the external environment are, in some cases, required. This resource is a rapid, definitive reference on hermetic packaging for the MEMS and microelectronics industry, giving practical guidance on traditional and newly developed test methods. This book includes up-to-date and applicable test methods for today’s package types. The authors cover the history and development of packaging, along with a view to understanding initial hermeticity testing requirements and the subsequent limitations of these methods when applied to new package types.




Advanced Packaging and Manufacturing Technology Based on Adhesion Engineering


Book Description

This book introduces microelectromechanical systems (MEMS) packaging utilizing polymers or thin films – a new and unique packaging technology. It first investigates the relationship between applied load and opening displacement as a function of benzocyclobutene (BCB) cap size to find the debonding behavior, and then presents BCB cap deformation and stress development at different opening displacements as a function of BCB thickness, which is a criterion for BCB cap transfer failure. Transfer packaging techniques are attracting increasing interest because they deliver packaging caps, from carrier wafers to device wafers, and minimize the fabrication issues frequently encountered in thin-film or polymer cap encapsulation. The book describes very-low-loss polymer cap or thin-film-transfer techniques based on anti-adhesion coating methods for radio frequency (RF) (-MEMS) device packaging. Since the polymer caps are susceptible to deformation due to their relatively low mechanical stiffness during debonding of the carrier wafer, the book develops an appropriate finite element model (FEM) to simulate the debonding process occurring in the interface between Si carrier wafer and BCB cap. Lastly, it includes the load–displacement curve of different materials and presents a flexible polymer filter and a tunable filter as examples of the applications of the proposed technology.




Polymer-based Wafer-level Packaging of Micromachined HARPSS Devices


Book Description

This thesis reports on a new low-cost wafer-level packaging technology for microelectromechanical systems (MEMS). The MEMS process is based on a revised version of High Aspect Ratio Polysilicon and Single Crystal Silicon (HARPSS) technology. The packaging technique is based on thermal decomposition of a sacrificial polymer through a polymer overcoat followed by metal coating to create resizable MEMS packages. The sacrificial polymer is created on top of the active component including beams, seismic mass, and electrodes by photodefining, dispensing, etching, or molding. The low loss polymer overcoat is patterned by photodefinition to provide access to the bond pads. The sacrificial polymer decomposes at temperatures around 200-280aC and the volatile products permeate through the overcoat polymer leaving an embedded air-cavity. For MEMS devices that do not need hermetic packaging, the encapsulated device can then be handled and packaged like an integrated circuit. For devices that are sensitive to humidity or need vacuum environment, hermiticity is obtained by deposition and patterning thin-film metals such as aluminum, chromium, copper, or gold. To demonstrate the potential of this technology, different types of capacitive MEMS devices have been designed, fabricated, packaged, and characterized. These includes beam resonators, RF tunable capacitors, accelerometers, and gyroscopes. The MEMS design includes mechanical, thermal, and electromagnetic analysis. The device performance, before and after packaging is compared and the correlation to the model is presented. The following is a summary of the main contributions of this work to the extensive research focused on MEMS and their packaging: 1)A new low-cost wafer-level packaging method for bulk or surface micromachined devices including resonators, RF passives and mechanical sensors is reported. This technique utilizes thermal decomposition of a sacrificial polymer through an overcoat polymer to create buried channels on top of the resonant/movable parts of the micromachined device. It provides small interconnections together with resizable package dimensions. We report MEMS package thicknesses in the range of 10 mm to 1 mm, and package size from 0.0001 mm^2 to 1 mm^2. 2)A revised version of the HARPSS technology is presented to implement high aspect ratio silicon capacitors, resonators and inertial sensors in the smallest area.




Wafer Level Hermetic Seal Process for Microelectromechanical Systems (MEMS) Devices


Book Description

A microelectromechanical systems (MEMS) structure with a cavity hermetically sealed using a mask layer is provided. A capping substrate is arranged over a MEMS substrate, which includes a movable element. The capping substrate includes the cavity arranged over and opening to the movable element, and includes a seal opening in fluid communication with the cavity. The mask layer is arranged over the capping substrate. The mask layer overhangs the seal opening and laterally surrounds a mask opening arranged over the seal opening. A seal layer is arranged over the mask layer and the mask opening. The seal layer is configured to hermetically seal the cavity. A method for manufacturing the MEMS structure is also provided.




Fan-Out Wafer-Level Packaging


Book Description

This comprehensive guide to fan-out wafer-level packaging (FOWLP) technology compares FOWLP with flip chip and fan-in wafer-level packaging. It presents the current knowledge on these key enabling technologies for FOWLP, and discusses several packaging technologies for future trends. The Taiwan Semiconductor Manufacturing Company (TSMC) employed their InFO (integrated fan-out) technology in A10, the application processor for Apple’s iPhone, in 2016, generating great excitement about FOWLP technology throughout the semiconductor packaging community. For many practicing engineers and managers, as well as scientists and researchers, essential details of FOWLP – such as the temporary bonding and de-bonding of the carrier on a reconstituted wafer/panel, epoxy molding compound (EMC) dispensing, compression molding, Cu revealing, RDL fabrication, solder ball mounting, etc. – are not well understood. Intended to help readers learn the basics of problem-solving methods and understand the trade-offs inherent in making system-level decisions quickly, this book serves as a valuable reference guide for all those faced with the challenging problems created by the ever-increasing interest in FOWLP, helps to remove roadblocks, and accelerates the design, materials, process, and manufacturing development of key enabling technologies for FOWLP.




MEMS/MOEM Packaging


Book Description

While MEMS technology has progressed rapidly, commercialization of MEMS has been hindered by packaging technology barriers and costs. One of the key issues in the industrialization of MEMS, MOEM and ultimately Nanoelectrical devices is the development of appropriate packaging solutions for the protection, assembly, and long term reliable operation. This book rigorously examines the properties of the materials used in MEMS and MOEN assembly then evaluates them in terms of their routing, electrical performance, thermal management and reliability. With this as a starting point, the book moves on to discuss advanced packaging methods such as: molded thermoplastic packages for MEMS, wafer-assembled RFID, and wafer-level stacked packaging.




Embedded and Fan-Out Wafer and Panel Level Packaging Technologies for Advanced Application Spaces


Book Description

Discover an up-to-date exploration of Embedded and Fan-Out Waver and Panel Level technologies In Embedded and Fan-Out Wafer and Panel Level Packaging Technologies for Advanced Application Spaces: High Performance Compute and System-in-Package, a team of accomplished semiconductor experts delivers an in-depth treatment of various fan-out and embedded die approaches. The book begins with a market analysis of the latest technology trends in Fan-Out and Wafer Level Packaging before moving on to a cost analysis of these solutions. The contributors discuss the new package types for advanced application spaces being created by companies like TSMC, Deca Technologies, and ASE Group. Finally, emerging technologies from academia are explored. Embedded and Fan-Out Wafer and Panel Level Packaging Technologies for Advanced Application Spaces is an indispensable resource for microelectronic package engineers, managers, and decision makers working with OEMs and IDMs. It is also a must-read for professors and graduate students working in microelectronics packaging research.