Embedded and Fan-Out Wafer and Panel Level Packaging Technologies for Advanced Application Spaces


Book Description

Discover an up-to-date exploration of Embedded and Fan-Out Waver and Panel Level technologies In Embedded and Fan-Out Wafer and Panel Level Packaging Technologies for Advanced Application Spaces: High Performance Compute and System-in-Package, a team of accomplished semiconductor experts delivers an in-depth treatment of various fan-out and embedded die approaches. The book begins with a market analysis of the latest technology trends in Fan-Out and Wafer Level Packaging before moving on to a cost analysis of these solutions. The contributors discuss the new package types for advanced application spaces being created by companies like TSMC, Deca Technologies, and ASE Group. Finally, emerging technologies from academia are explored. Embedded and Fan-Out Wafer and Panel Level Packaging Technologies for Advanced Application Spaces is an indispensable resource for microelectronic package engineers, managers, and decision makers working with OEMs and IDMs. It is also a must-read for professors and graduate students working in microelectronics packaging research.




Polymer-based Wafer-level Packaging of Micromachined HARPSS Devices


Book Description

This thesis reports on a new low-cost wafer-level packaging technology for microelectromechanical systems (MEMS). The MEMS process is based on a revised version of High Aspect Ratio Polysilicon and Single Crystal Silicon (HARPSS) technology. The packaging technique is based on thermal decomposition of a sacrificial polymer through a polymer overcoat followed by metal coating to create resizable MEMS packages. The sacrificial polymer is created on top of the active component including beams, seismic mass, and electrodes by photodefining, dispensing, etching, or molding. The low loss polymer overcoat is patterned by photodefinition to provide access to the bond pads. The sacrificial polymer decomposes at temperatures around 200-280aC and the volatile products permeate through the overcoat polymer leaving an embedded air-cavity. For MEMS devices that do not need hermetic packaging, the encapsulated device can then be handled and packaged like an integrated circuit. For devices that are sensitive to humidity or need vacuum environment, hermiticity is obtained by deposition and patterning thin-film metals such as aluminum, chromium, copper, or gold. To demonstrate the potential of this technology, different types of capacitive MEMS devices have been designed, fabricated, packaged, and characterized. These includes beam resonators, RF tunable capacitors, accelerometers, and gyroscopes. The MEMS design includes mechanical, thermal, and electromagnetic analysis. The device performance, before and after packaging is compared and the correlation to the model is presented. The following is a summary of the main contributions of this work to the extensive research focused on MEMS and their packaging: 1)A new low-cost wafer-level packaging method for bulk or surface micromachined devices including resonators, RF passives and mechanical sensors is reported. This technique utilizes thermal decomposition of a sacrificial polymer through an overcoat polymer to create buried channels on top of the resonant/movable parts of the micromachined device. It provides small interconnections together with resizable package dimensions. We report MEMS package thicknesses in the range of 10 mm to 1 mm, and package size from 0.0001 mm^2 to 1 mm^2. 2)A revised version of the HARPSS technology is presented to implement high aspect ratio silicon capacitors, resonators and inertial sensors in the smallest area.




Advanced Packaging and Manufacturing Technology Based on Adhesion Engineering


Book Description

This book introduces microelectromechanical systems (MEMS) packaging utilizing polymers or thin films – a new and unique packaging technology. It first investigates the relationship between applied load and opening displacement as a function of benzocyclobutene (BCB) cap size to find the debonding behavior, and then presents BCB cap deformation and stress development at different opening displacements as a function of BCB thickness, which is a criterion for BCB cap transfer failure. Transfer packaging techniques are attracting increasing interest because they deliver packaging caps, from carrier wafers to device wafers, and minimize the fabrication issues frequently encountered in thin-film or polymer cap encapsulation. The book describes very-low-loss polymer cap or thin-film-transfer techniques based on anti-adhesion coating methods for radio frequency (RF) (-MEMS) device packaging. Since the polymer caps are susceptible to deformation due to their relatively low mechanical stiffness during debonding of the carrier wafer, the book develops an appropriate finite element model (FEM) to simulate the debonding process occurring in the interface between Si carrier wafer and BCB cap. Lastly, it includes the load–displacement curve of different materials and presents a flexible polymer filter and a tunable filter as examples of the applications of the proposed technology.




Advances in Embedded and Fan-Out Wafer Level Packaging Technologies


Book Description

Examines the advantages of Embedded and FO-WLP technologies, potential application spaces, package structures available in the industry, process flows, and material challenges Embedded and fan-out wafer level packaging (FO-WLP) technologies have been developed across the industry over the past 15 years and have been in high volume manufacturing for nearly a decade. This book covers the advances that have been made in this new packaging technology and discusses the many benefits it provides to the electronic packaging industry and supply chain. It provides a compact overview of the major types of technologies offered in this field, on what is available, how it is processed, what is driving its development, and the pros and cons. Filled with contributions from some of the field's leading experts,Advances in Embedded and Fan-Out Wafer Level Packaging Technologies begins with a look at the history of the technology. It then goes on to examine the biggest technology and marketing trends. Other sections are dedicated to chip-first FO-WLP, chip-last FO-WLP, embedded die packaging, materials challenges, equipment challenges, and resulting technology fusions. Discusses specific company standards and their development results Content relates to practice as well as to contemporary and future challenges in electronics system integration and packaging Advances in Embedded and Fan-Out Wafer Level Packaging Technologies will appeal to microelectronic packaging engineers, managers, and decision makers working in OEMs, IDMs, IFMs, OSATs, silicon foundries, materials suppliers, equipment suppliers, and CAD tool suppliers. It is also an excellent book for professors and graduate students working in microelectronic packaging research.




Fan-Out Wafer-Level Packaging


Book Description

This comprehensive guide to fan-out wafer-level packaging (FOWLP) technology compares FOWLP with flip chip and fan-in wafer-level packaging. It presents the current knowledge on these key enabling technologies for FOWLP, and discusses several packaging technologies for future trends. The Taiwan Semiconductor Manufacturing Company (TSMC) employed their InFO (integrated fan-out) technology in A10, the application processor for Apple’s iPhone, in 2016, generating great excitement about FOWLP technology throughout the semiconductor packaging community. For many practicing engineers and managers, as well as scientists and researchers, essential details of FOWLP – such as the temporary bonding and de-bonding of the carrier on a reconstituted wafer/panel, epoxy molding compound (EMC) dispensing, compression molding, Cu revealing, RDL fabrication, solder ball mounting, etc. – are not well understood. Intended to help readers learn the basics of problem-solving methods and understand the trade-offs inherent in making system-level decisions quickly, this book serves as a valuable reference guide for all those faced with the challenging problems created by the ever-increasing interest in FOWLP, helps to remove roadblocks, and accelerates the design, materials, process, and manufacturing development of key enabling technologies for FOWLP.




Mems Packaging


Book Description

MEMS sensors and actuators are enabling components for smartphones, AR/VR, and wearable electronics. MEMS packaging is recognized as one of the most critical activities to design and manufacture reliable MEMS. A unique challenge to MEMS packaging is how to protect moving MEMS devices during manufacturing and operation. With the introduction of wafer level capping and encapsulation processes, this barrier is removed successfully. In addition, MEMS devices should be integrated with their electronic chips with the smallest footprint possible. As a result, 3D packaging is applied to connect the devices vertically for the most effective integration. Such 3D packaging also paves the way for further heterogenous integration of MEMS devices, electronics, and other functional devices.This book consists of chapters written by leaders developing products in a MEMS industrial setting and faculty members conducting research in an academic setting. After an introduction chapter, the practical issues are covered: through-silicon vias (TSVs), vertical interconnects, wafer level packaging, motion sensor-to-CMOS bonding, and use of printed circuit board technology to fabricate MEMS. These chapters are written by leaders developing MEMS products. Then, fundamental issues are discussed, topics including encapsulation of MEMS, heterogenous integration, microfluidics, solder bonding, localized sealing, microsprings, and reliability.







Handbook of Silicon Based MEMS Materials and Technologies


Book Description

Handbook of Silicon Based MEMS Materials and Technologies, Third Edition is a comprehensive guide to MEMS materials, technologies, and manufacturing with a particular emphasis on silicon as the most important starting material used in MEMS. The book explains the fundamentals, properties (mechanical, electrostatic, optical, etc.), materials selection, preparation, modeling, manufacturing, processing, system integration, measurement, and materials characterization techniques of MEMS structures. The third edition of this book provides an important up-to-date overview of the current and emerging technologies in MEMS making it a key reference for MEMS professionals, engineers, and researchers alike, and at the same time an essential education material for undergraduate and graduate students. - Provides comprehensive overview of leading-edge MEMS manufacturing technologies through the supply chain from silicon ingot growth to device fabrication and integration with sensor/actuator controlling circuits - Explains the properties, manufacturing, processing, measuring and modeling methods of MEMS structures - Reviews the current and future options for hermetic encapsulation and introduces how to utilize wafer level packaging and 3D integration technologies for package cost reduction and performance improvements - Geared towards practical applications presenting several modern MEMS devices including inertial sensors, microphones, pressure sensors and micromirrors