A Platform-Centric Approach to System-on-Chip (SOC) Design


Book Description

Increasing system complexity has created a pressing need for better design tools and associated methodologies and languages for meeting the stringent time to market and cost constraints. Platform-centric and platfo- based system-on-chip (SoC) design methodologies, based on reuse of software and hardware functionality, has also gained increasing exposure and usage within the Electronic System-Level (ESL) design communities. The book proposes a new methodology for realizing platform-centric design of complex systems, and presents a detailed plan for its implementation. The proposed plan allows component vendors, system integrators and product developers to collaborate effectively and efficiently to create complex products within budget and schedule constraints. This book focuses more on the use of platforms in the design of products, and not on the design of platforms themselves. Platform-centric design is not for everyone, as some may feel that it does not allow them to differentiate their offering from competitors to a significant degree. However, its proponents may claim that the time-- market and cost advantages of platform-centric design more than compensate for any drawbacks.




Computational Science and Its Applications - ICCSA 2006


Book Description

The five-volume set LNCS 3980-3984 constitutes the refereed proceedings of the International Conference on Computational Science and Its Applications, ICCSA 2006. The volumes present a total of 664 papers organized according to the five major conference themes: computational methods, algorithms and applications high performance technical computing and networks advanced and emerging applications geometric modelling, graphics and visualization information systems and information technologies. This is Part II.







Embedded Systems Handbook


Book Description

Considered a standard industry resource, the Embedded Systems Handbook provided researchers and technicians with the authoritative information needed to launch a wealth of diverse applications, including those in automotive electronics, industrial automated systems, and building automation and control. Now a new resource is required to report on current developments and provide a technical reference for those looking to move the field forward yet again. Divided into two volumes to accommodate this growth, the Embedded Systems Handbook, Second Edition presents a comprehensive view on this area of computer engineering with a currently appropriate emphasis on developments in networking and applications. Those experts directly involved in the creation and evolution of the ideas and technologies presented offer tutorials, research surveys, and technology overviews that explore cutting-edge developments and deployments and identify potential trends. This first self-contained volume of the handbook, Embedded Systems Design and Verification, is divided into three sections. It begins with a brief introduction to embedded systems design and verification. It then provides a comprehensive overview of embedded processors and various aspects of system-on-chip and FPGA, as well as solutions to design challenges. The final section explores power-aware embedded computing, design issues specific to secure embedded systems, and web services for embedded devices. Those interested in taking their work with embedded systems to the network level should complete their study with the second volume: Network Embedded Systems.




Interconnect-Centric Design for Advanced SOC and NOC


Book Description

In Interconnect-centric Design for Advanced SoC and NoC, we have tried to create a comprehensive understanding about on-chip interconnect characteristics, design methodologies, layered views on different abstraction levels and finally about applying the interconnect-centric design in system-on-chip design. Traditionally, on-chip communication design has been done using rather ad-hoc and informal approaches that fail to meet some of the challenges posed by next-generation SOC designs, such as performance and throughput, power and energy, reliability, predictability, synchronization, and management of concurrency. To address these challenges, it is critical to take a global view of the communication problem, and decompose it along lines that make it more tractable. We believe that a layered approach similar to that defined by the communication networks community should also be used for on-chip communication design. The design issues are handled on physical and circuit layer, logic and architecture layer, and from system design methodology and tools point of view. Formal communication modeling and refinement is used to bridge the communication layers, and network-centric modeling of multiprocessor on-chip networks and socket-based design will serve the development of platforms for SoC and NoC integration. Interconnect-centric Design for Advanced SoC and NoC is concluded by two application examples: interconnect and memory organization in SoCs for advanced set-top boxes and TV, and a case study in NoC platform design for more generic applications.




Interconnect-Centric Design for Advanced SOC and NOC


Book Description

In Interconnect-centric Design for Advanced SoC and NoC, we have tried to create a comprehensive understanding about on-chip interconnect characteristics, design methodologies, layered views on different abstraction levels and finally about applying the interconnect-centric design in system-on-chip design. Traditionally, on-chip communication design has been done using rather ad-hoc and informal approaches that fail to meet some of the challenges posed by next-generation SOC designs, such as performance and throughput, power and energy, reliability, predictability, synchronization, and management of concurrency. To address these challenges, it is critical to take a global view of the communication problem, and decompose it along lines that make it more tractable. We believe that a layered approach similar to that defined by the communication networks community should also be used for on-chip communication design. The design issues are handled on physical and circuit layer, logic and architecture layer, and from system design methodology and tools point of view. Formal communication modeling and refinement is used to bridge the communication layers, and network-centric modeling of multiprocessor on-chip networks and socket-based design will serve the development of platforms for SoC and NoC integration. Interconnect-centric Design for Advanced SoC and NoC is concluded by two application examples: interconnect and memory organization in SoCs for advanced set-top boxes and TV, and a case study in NoC platform design for more generic applications.







System on Package


Book Description

System-on-Package (SOP) is an emerging microelectronic technology that places an entire system on a single chip-size package. Where “systems” used to be bulky boxes housing hundreds of components, SOP saves interconnection time and heat generation by keep a full system with computing, communications, and consumer functions all in a single chip. Written by the Georgia Tech developers of the technology, this book explains the basic parameters, design functions, and manufacturing issues, showing electronic designers how this radical new packaging technology can be used to solve pressing electronics design challenges.




Pipelined Multiprocessor System-on-Chip for Multimedia


Book Description

This book describes analytical models and estimation methods to enhance performance estimation of pipelined multiprocessor systems-on-chip (MPSoCs). A framework is introduced for both design-time and run-time optimizations. For design space exploration, several algorithms are presented to minimize the area footprint of a pipelined MPSoC under a latency or a throughput constraint. A novel adaptive pipelined MPSoC architecture is described, where idle processors are transitioned into low-power states at run-time to reduce energy consumption. Multi-mode pipelined MPSoCs are introduced, where multiple pipelined MPSoCs optimized separately are merged into a single pipelined MPSoC, enabling further reduction of the area footprint by sharing the processors and communication buffers. Readers will benefit from the authors’ combined use of analytical models, estimation methods and exploration algorithms and will be enabled to explore billions of design points in a few minutes.




Integrated System-Level Modeling of Network-on-Chip enabled Multi-Processor Platforms


Book Description

Integrated System-Level Modeling of Network-on-Chip Enabled Multi-Processor Platforms first gives a comprehensive update on recent developments in the area of SoC platforms and ESL design methodologies. The main contribution is the rigorous definition of a framework for modeling at the timing approximate level of abstraction. Subsequently this book presents a set of tools for the creation and exploration of timing approximate SoC platform models.