Adaptive Digital Circuits for Power-Performance Range beyond Wide Voltage Scaling


Book Description

This book offers the first comprehensive coverage of digital design techniques to expand the power-performance tradeoff well beyond that allowed by conventional wide voltage scaling. Compared to conventional fixed designs, the approach described in this book makes digital circuits more versatile and adaptive, allowing simultaneous optimization at both ends of the power-performance spectrum. Drop-in solutions for fully automated and low-effort design based on commercial CAD tools are discussed extensively for processors, accelerators and on-chip memories, and are applicable to prominent applications (e.g., IoT, AI, wearables, biomedical). Through the higher power-performance versatility techniques described in this book, readers are enabled to reduce the design effort through reuse of the same digital design instance, across a wide range of applications. All concepts the authors discuss are demonstrated by dedicated testchip designs and experimental results. To make the results immediately usable by the reader, all the scripts necessary to create automated design flows based on commercial tools are provided and explained.




Constructive Side-Channel Analysis and Secure Design


Book Description

This book constitutes revised selected papers from the 11th International Workshop on Constructive Side-Channel Analysis and Secure Design, COSADE 2021, held in Lugano, Switzerland, in October 2021. The 14 full papers carefully reviewed and selected from 31 submissions are presented in this volume together with the 4 extended keynote abstracts. The workshop covers the following subjects: cryptography, side-channel analysis, cryptographic implementations, fault attacks, implementation attacks, post-quantum cryptography, hardware accelerators, etc.




Enabling the Internet of Things


Book Description

This book offers the first comprehensive view on integrated circuit and system design for the Internet of Things (IoT), and in particular for the tiny nodes at its edge. The authors provide a fresh perspective on how the IoT will evolve based on recent and foreseeable trends in the semiconductor industry, highlighting the key challenges, as well as the opportunities for circuit and system innovation to address them. This book describes what the IoT really means from the design point of view, and how the constraints imposed by applications translate into integrated circuit requirements and design guidelines. Chapter contributions equally come from industry and academia. After providing a system perspective on IoT nodes, this book focuses on state-of-the-art design techniques for IoT applications, encompassing the fundamental sub-systems encountered in Systems on Chip for IoT: ultra-low power digital architectures and circuits low- and zero-leakage memories (including emerging technologies) circuits for hardware security and authentication System on Chip design methodologies on-chip power management and energy harvesting ultra-low power analog interfaces and analog-digital conversion short-range radios miniaturized battery technologies packaging and assembly of IoT integrated systems (on silicon and non-silicon substrates). As a common thread, all chapters conclude with a prospective view on the foreseeable evolution of the related technologies for IoT. The concepts developed throughout the book are exemplified by two IoT node system demonstrations from industry. The unique balance between breadth and depth of this book: enables expert readers quickly to develop an understanding of the specific challenges and state-of-the-art solutions for IoT, as well as their evolution in the foreseeable future provides non-experts with a comprehensive introduction to integrated circuit design for IoT, and serves as an excellent starting point for further learning, thanks to the broad coverage of topics and selected references makes it very well suited for practicing engineers and scientists working in the hardware and chip design for IoT, and as textbook for senior undergraduate, graduate and postgraduate students ( familiar with analog and digital circuits).




Dual Mode Logic


Book Description

This book presents Dual Mode Logic (DML), a new design paradigm for digital integrated circuits. DML logic gates can operate in two modes, each optimized for a different metric. Its on-the-fly switching between these operational modes at the gate, block and system levels provide maximal E-D optimization flexibility. Each highly detailed chapter has multiple illustrations showing how the DML paradigm seamlessly implements digital circuits that dissipate less energy while simultaneously improving performance and reducing area without a significant compromise in reliability. All the facets of the DML methodology are covered, starting from basic concepts, through single gate optimization, general module optimization, design trade-offs and new ways DML can be integrated into standard design flows using standard EDA tools. DML logic is compatible with numerous applications but is particularly advantageous for ultra-low power, reliable high performance systems, and advanced scaled technologies Written in language accessible to students and design engineers, each topic is oriented toward immediate application by all those interested in an alternative to CMOS logic. Describes a novel, promising alternative to conventional CMOS logic, known as Dual Mode Logic (DML), with which a single gate can be operated selectively in two modes, each optimized for a different metric (e.g., energy consumption, performance, size); Demonstrates several techniques at the architectural level, which can result in high energy savings and improved system performance; Focuses on the tradeoffs between power, area and speed including optimizations at the transistor and gate level, including alternatives to DML basic cells; Illustrates DML efficiency for a variety of VLSI applications.




Modern Processor Design


Book Description

Conceptual and precise, Modern Processor Design brings together numerous microarchitectural techniques in a clear, understandable framework that is easily accessible to both graduate and undergraduate students. Complex practices are distilled into foundational principles to reveal the authors insights and hands-on experience in the effective design of contemporary high-performance micro-processors for mobile, desktop, and server markets. Key theoretical and foundational principles are presented in a systematic way to ensure comprehension of important implementation issues. The text presents fundamental concepts and foundational techniques such as processor design, pipelined processors, memory and I/O systems, and especially superscalar organization and implementations. Two case studies and an extensive survey of actual commercial superscalar processors reveal real-world developments in processor design and performance. A thorough overview of advanced instruction flow techniques, including developments in advanced branch predictors, is incorporated. Each chapter concludes with homework problems that will institute the groundwork for emerging techniques in the field and an introduction to multiprocessor systems.




Low-Power CMOS Wireless Communications


Book Description

Low-Power CMOS Wireless Communications: A Wideband CDMA System Design focuses on the issues behind the development of a high-bandwidth, silicon complementary metal-oxide silicon (CMOS) low-power transceiver system for mobile RF wireless data communications. In the design of any RF communications system, three distinct factors must be considered: the propagation environment in question, the multiplexing and modulation of user data streams, and the complexity of hardware required to implement the desired link. None of these can be allowed to dominate. Coupling between system design and implementation is the key to simultaneously achieving high bandwidth and low power and is emphasized throughout the book. The material presented in Low-Power CMOS Wireless Communications: A Wideband CDMA System Design is the result of broadband wireless systems research done at the University of California, Berkeley. The wireless development was motivated by a much larger collaborative effort known as the Infopad Project, which was centered on developing a mobile information terminal for multimedia content - a wireless `network computer'. The desire for mobility, combined with the need to support potentially hundreds of users simultaneously accessing full-motion digital video, demanded a wireless solution that was of far lower power and higher data rate than could be provided by existing systems. That solution is the topic of this book: a case study of not only wireless systems designs, but also the implementation of such a link, down to the analog and digital circuit level.




Low-Power VLSI Circuits and Systems


Book Description

The book provides a comprehensive coverage of different aspects of low power circuit synthesis at various levels of design hierarchy; starting from the layout level to the system level. For a seamless understanding of the subject, basics of MOS circuits has been introduced at transistor, gate and circuit level; followed by various low-power design methodologies, such as supply voltage scaling, switched capacitance minimization techniques and leakage power minimization approaches. The content of this book will prove useful to students, researchers, as well as practicing engineers.




ISPSD'04


Book Description




Computer Architecture Techniques for Power-efficiency


Book Description

In the last few years, power dissipation has become an important design constraint, on par with performance, in the design of new computer systems. Whereas in the past, the primary job of the computer architect was to translate improvements in operating frequency and transistor count into performance, now power efficiency must be taken into account at every step of the design process. While for some time, architects have been successful in delivering 40% to 50% annual improvement in processor performance, costs that were previously brushed aside eventually caught up. The most critical of these costs is the inexorable increase in power dissipation and power density in processors. Power dissipation issues have catalyzed new topic areas in computer architecture, resulting in a substantial body of work on more power-efficient architectures. Power dissipation coupled with diminishing performance gains, was also the main cause for the switch from single-core to multi-core architectures and a slowdown in frequency increase. This book aims to document some of the most important architectural techniques that were invented, proposed, and applied to reduce both dynamic power and static power dissipation in processors and memory hierarchies. A significant number of techniques have been proposed for a wide range of situations and this book synthesizes those techniques by focusing on their common characteristics.




Model and Design of Bipolar and MOS Current-Mode Logic


Book Description

Current-Mode digital circuits have been extensively analyzed and used since the early days of digital ICs. In particular, bipolar Current-Mode digital circuits emerged as an approach to realize digital circuits with the highest speed. Together with its speed performance, CMOS Current-Mode logic has been rediscovered to allow logic gates implementations which, in contrast to classical VLSI CMOS digital circuits, have the feature of low noise level generation. Thus, CMOS Current-Mode gates can be efficiently used inside analog and mixed-signal ICs, which require a low noise silicon environment. For these reasons, until today, many works and results have been published which reinforce the importance of Current-Mode digital circuits. In the topic of Current-Mode digital circuits, the authors spent a lot of effort in the last six years, and their original results highly enhanced both the modeling and the related design methodologies. Since the fundamental Current-Mode logic building block is the classical differential amplifier, the winning idea, that represents the starting point of the authors’ research, was to change the classical point of view typically followed in the investigation and design of Current-Mode digital circuits. In particular, they properly exploited classical paradigms developed and used in the analog circuit domain (a topic in which one of the authors maturated a great experience).