Algorithms for Synthesis and Testing of Asynchronous Circuits


Book Description

Since the second half of the 1980s asynchronous circuits have been the subject of a great deal of research following a period of relative oblivion. The lack of interest in asynchronous techniques was motivated by the progressive shift towards synchronous design techniques that had much more structure and were much easier to verify and synthesize. System design requirements made it impossible to eliminate totally the use of asynchronous circuits. Given the objective difficulty encountered by designers, the asynchronous components of electronic systems such as interfaces became a serious bottleneck in the design process. The use of new models and some theoretical breakthroughs made it possible to develop asynchronous design techniques that were reliable and effective. This book describes a variety of mathematical models and of algorithms that form the backbone and the body of a new design methodology for asyn chronous design. The book is intended for asynchronous hardware designers, for computer-aided tool experts, and for digital designers interested in ex ploring the possibility of designing asynchronous circuits. It requires a solid mathematical background in discrete event systems and algorithms. While the book has not been written as a textbook, nevertheless it could be used as a reference book in an advanced course in logic synthesis or asynchronous design.




Asynchronous Circuit Design


Book Description

With asynchronous circuit design becoming a powerful tool in thedevelopment of new digital systems, circuit designers are expectedto have asynchronous design skills and be able to leverage them toreduce power consumption and increase system speed. This book walksreaders through all of the different methodologies of asynchronouscircuit design, emphasizing practical techniques and real-worldapplications instead of theoretical simulation. The only guide ofits kind, it also features an ftp site complete with supportmaterials. Market: Electrical Engineers, Computer Scientists, DeviceDesigners, and Developers in industry. An Instructor Support FTP site is available from the Wileyeditorial department.




Principles of Asynchronous Circuit Design


Book Description

Principles of Asynchronous Circuit Design - A Systems Perspective addresses the need for an introductory text on asynchronous circuit design. Part I is an 8-chapter tutorial which addresses the most important issues for the beginner, including how to think about asynchronous systems. Part II is a 4-chapter introduction to Balsa, a freely-available synthesis system for asynchronous circuits which will enable the reader to get hands-on experience of designing high-level asynchronous systems. Part III offers a number of examples of state-of-the-art asynchronous systems to illustrate what can be built using asynchronous techniques. The examples range from a complete commercial smart card chip to complex microprocessors. The objective in writing this book has been to enable industrial designers with a background in conventional (clocked) design to be able to understand asynchronous design sufficiently to assess what it has to offer and whether it might be advantageous in their next design task.




Lectures on Petri Nets II: Applications


Book Description

The two-volume set originates from the Advanced Course on Petri Nets held in Dagstuhl, Germany in September 1996; beyond the lectures given there, additional chapters have been commissioned to give a well-balanced presentation of the state of the art in the area. Together with its companion volume "Lectures on Petri Nets I: Basic Models" this book is the actual reference for the area and addresses professionals, students, lecturers, and researchers who are - interested in systems design and would like to learn to use Petri nets familiar with subareas of the theory or its applications and wish to view the whole area - interested in learning about recent results presented within a unified framework - planning to apply Petri nets in practical situations - interested in the relationship of Petri nets to other models of concurrent systems.




Logic Synthesis and Verification


Book Description

Research and development of logic synthesis and verification have matured considerably over the past two decades. Many commercial products are available, and they have been critical in harnessing advances in fabrication technology to produce today's plethora of electronic components. While this maturity is assuring, the advances in fabrication continue to seemingly present unwieldy challenges. Logic Synthesis and Verification provides a state-of-the-art view of logic synthesis and verification. It consists of fifteen chapters, each focusing on a distinct aspect. Each chapter presents key developments, outlines future challenges, and lists essential references. Two unique features of this book are technical strength and comprehensiveness. The book chapters are written by twenty-eight recognized leaders in the field and reviewed by equally qualified experts. The topics collectively span the field. Logic Synthesis and Verification fills a current gap in the existing CAD literature. Each chapter contains essential information to study a topic at a great depth, and to understand further developments in the field. The book is intended for seniors, graduate students, researchers, and developers of related Computer-Aided Design (CAD) tools. From the foreword: "The commercial success of logic synthesis and verification is due in large part to the ideas of many of the authors of this book. Their innovative work contributed to design automation tools that permanently changed the course of electronic design." by Aart J. de Geus, Chairman and CEO, Synopsys, Inc.




Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation


Book Description

This volume features the refereed proceedings of the 17th International Workshop on Power and Timing Modeling, Optimization and Simulation. Papers cover high level design, low power design techniques, low power analog circuits, statistical static timing analysis, power modeling and optimization, low power routing optimization, security and asynchronous design, low power applications, modeling and optimization, and more.




Introduction to Asynchronous Circuit Design


Book Description

This book is an introduction to the design of asynchronous circuits. It is an updated and significantly extended version of an eight-chapter tutorial that first appeared as Part I in the book "Principles of asynchronous circuit design -- A systems perspective" edited by Sparsø and Furber (2001); a book that has become a standard reference on the topic. The extensions include improved coverage of data-flow components, a new chapter on two-phase bundled-data circuits, a new chapter on metastability, arbitration, and synchronization, and a new chapter on performance analysis using timed Petri nets. With these extensions, the text now provides a more complete coverage of the topic, and it is now made available as a stand-alone book. The book is a beginner's text and the amount of formal notation is deliberately kept at a minimum, using instead plain English and graphical illustrations to explain the underlying intuition and reasoning behind the concepts and methods covered. The book targets senior undergraduate and graduate students in Electrical and Computer Engineering and industrial designers with a background in conventional (clocked) digital design who wish to gain an understanding of asynchronous circuit design.




Application and Theory of Petri Nets 2000


Book Description

This book constitutes the refereed proceedings of the 21st International Conference on Application and Theory of Petri Nets, ICATPN 2000, held in Aarhus, Denmark, in June 2000. The 20 revised full papers presented together with four invited surveys and four tool presentations were carefully reviewed and selected from 57 submissions. The papers address all current aspects of Petri net research and development including system design and verification, UML, compositionality, process algebras, model checking, computer networking, business process engineering, communication networks, etc. Various classes of Petri nets are discussed including safe Petri nets, high-level Petri nets, colored Petri nets, P/T nets, and timed Petri nets.




Essentials of Electronic Testing for Digital, Memory and Mixed-Signal VLSI Circuits


Book Description

The modern electronic testing has a forty year history. Test professionals hold some fairly large conferences and numerous workshops, have a journal, and there are over one hundred books on testing. Still, a full course on testing is offered only at a few universities, mostly by professors who have a research interest in this area. Apparently, most professors would not have taken a course on electronic testing when they were students. Other than the computer engineering curriculum being too crowded, the major reason cited for the absence of a course on electronic testing is the lack of a suitable textbook. For VLSI the foundation was provided by semiconductor device techn- ogy, circuit design, and electronic testing. In a computer engineering curriculum, therefore, it is necessary that foundations should be taught before applications. The field of VLSI has expanded to systems-on-a-chip, which include digital, memory, and mixed-signalsubsystems. To our knowledge this is the first textbook to cover all three types of electronic circuits. We have written this textbook for an undergraduate “foundations” course on electronic testing. Obviously, it is too voluminous for a one-semester course and a teacher will have to select from the topics. We did not restrict such freedom because the selection may depend upon the individual expertise and interests. Besides, there is merit in having a larger book that will retain its usefulness for the owner even after the completion of the course. With equal tenacity, we address the needs of three other groups of readers.




Analog Device-Level Layout Automation


Book Description

This book presents a detailed summary of research on automatic layout of device-level analog circuits that was undertaken in the late 1980s and early 1990s at Carnegie Mellon University. We focus on the work behind the creation of the tools called KOAN and ANAGRAM II, which form part of the core of the CMU ACACIA analog CAD system. KOAN is a device placer for custom analog cells; ANANGRAM II a detailed area router for these analog cells. We strive to present the motivations behind the architecture of these tools, including detailed discussion of the subtle technology and circuit concerns that must be addressed in any successful analog or mixed-signal layout tool. Our approach in organizing the chapters of the book has been to present our algo rithms as a series of responses to these very real and very difficult analog layout problems. Finally, we present numerous examples of results generated by our algorithms. This research was supported in part by the Semiconductor Research Corpora tion, by the National Science Foundation, by Harris Semiconductor, and by the International Business Machines Corporation Resident Study Program. Finally, just for the record: John Cohn was the designer of the KOAN placer; David Garrod was the designer of the ANAGRAM II router (and its predeces sor, ANAGRAM I). This book was architected by all four authors, edited by John Cohn and Rob Rutenbar, and produced in finished form by John Cohn.