Envelope Tracking Power Amplifiers for Wireless Communications


Book Description

Envelope tracking technology is seen as the most promising efficiency enhancement technology for RF power amplifiers for 4G and beyond wireless communications. More and more organizations are investing and researching on this topic with huge potential in academic and commercial areas. This is the first book on the market to offer complete introduction, theory, and design considerations on envelope tracking for wireless communications. This resource presents you with a full introduction to the subject and covers underlying theory and practical design considerations.







Envelope Amplifier Design for Wireless Base-station Power Amplifiers


Book Description

In order to deliver high data rates, modern wireless communication systems transmit complex modulated signals with high peak-to-average ratio, which demands wide bandwidth and stringent linearity performance for power amplifiers. To satisfy spectral mask regulations and achieve adequate error vector magnitude, power amplifiers typically operate at 6 to 10 dB back-off from the maximum output power, leading to low efficiency. To overcome the low efficiency problem, the envelope tracking power amplifier architecture has been proposed for this type of application due to its feature of high efficiency over a wide power range. The overall efficiency of an envelope tracking system relies not only on performance of the RF power amplifier but also on that of an envelope amplifier that provides a dynamically varying power supply voltage. This dissertation focuses on envelope amplifier design for efficiency enhancement of envelope tracking power amplifiers. First, the envelope tracking power amplifier architecture is analyzed, and the efficiency of a RF transistor in the envelope tracking technique is described. Then envelope amplifier behavior is investigated and a general purpose simulator is developed for analyzing and designing an envelope amplifier. Power loss and efficiency of the envelope amplifier is analyzed and compared with experimental results. The design of envelope amplifiers for high voltage (> 30 V) envelope tracking applications is described. A high voltage envelope amplifier is designed, implemented and verified. The overall envelope tracking system employing a GaN-HEMT RF transistor is demonstrated. Finally, a new architecture is developed for the efficiency enhancement of envelope amplifiers, using a digitally assisted controller design. Digital control is utilized to mitigate delay in the control loop inside the envelope amplifier, leading to lower overall power dissipation. A novel envelope amplifier architecture with dual-switcher stages based on the digitally-assisted control strategy is proposed, designed and implemented. The strategy is demonstrated to improve the efficiency of envelope amplifier as well as the system overall efficiency. The resulting performance of envelope tracking system employing a GaAs high voltage HBT with a single carrier W-CDMA input demonstrated state-of-the-art efficiency with good linearity performance.




Envelope Amplifier for Broadband Base-station Envelope Tracking Power Amplifier


Book Description

Envelope tracking (ET), which is a dynamic supply control technology to realize high efficiency power amplifiers, is a promising approach for base-station transmitters of the future. The envelope amplifier (EA) in ET systems provides a non-constant modulated power supply to the RF transistor. It is challenging to design so that it is both broadband and high efficiency, while meeting the stringent linearity requirements for high peak-to-average ratio signals in modern wireless communication systems. This thesis focuses on EA design and implementation for efficiency enhancement of ET systems with broadband envelope input signals. First, the ET system architecture is analyzed, and the efficiencies of RF transistors and envelope amplifiers are described. Secondly, the principles of the EA operation are investigated, and each circuit stage is carefully designed for broadband signals. Then, an EA model, including the RF transistor load, is developed in PSpice, and many simulations are described in order to better analyze and design the broadband EA for high efficiency. After the design, a broadband EA is implemented on a PCB board. The testing with constant resistive loads is carried out to verify the function and measure the efficiencies of 5 MHz WCDMA and 20 MHz LTE-A downlink envelope signals. Finally, tests on the whole ET system are performed, and the overall drain and power added efficiencies are tabulated. For this broadband envelope amplifier, the efficiency for a 5 MHz WCDMA input signal is above 75%, and for 20 MHz LTE-A, it works robustly with an efficiency of 62%.




Concurrent Multi-band Envelope Tracking Power Amplifiers for Emerging Wireless Communications


Book Description

Emerging wireless communication is shifting toward data-centric broadband services, resulting in employment of sophisticated and spectrum efficient modulation and access techniques. This yields communication signals with large peak-to-average power ratios (PAPR) and stringent linearity requirements. For example, future wireless communication standard, such as long term evolution advanced (LTE-A) require adoption of carrier aggregation techniques to improve their effective modulation bandwidth. The carrier aggregation technique for LTE-A incorporates multiple carriers over a wide frequency range to create a wider bandwidth of up to 100MHz. This will require future power amplifiers (PAs) and transmitters to efficiently amplify concurrent multi-band signals with large PAPR, while maintaining good linearity. Different back-off efficiency enhancement techniques are available, such as envelope tracking (ET) and Doherty. ET has gained a lot of attention recently as it can be applied to both base station and mobile transmitters. Unfortunately, few publications have investigated concurrent multi-band amplification using ET PAs, mainly due to the limited bandwidth of the envelope amplifier. In this thesis, a novel approach to enable concurrent amplification of multi-band signals using a single ET PA will be presented. This thesis begins by studying the sources of nonlinearities in single-band and dual-band PAs. Based on the analysis, a design methodology is proposed to reduce the sources of memory effects in single-band and dual-band PAs from the circuit design stage and improve their linearizability. Using the proposed design methodology, a 45W GaN PA was designed. The PA was linearized using easy to implement, memoryless digital pre-distortion (DPD) with 8 and 28 coefficients when driven with single-band and dual-band signals, respectively. This analysis and design methodology will enable the design of PAs with reduced memory effects, which can be linearized using simple, power efficient linearization techniques, such as lookup table or memoryless polynomial DPD. Note that the power dissipation of the linearization engine becomes crucial as we move toward smaller base station cells, such as femto- and pico-cells, where complicated DPD models cannot be implemented due to their significant power overhead. This analysis is also very important when implementing a multi-band ET PA system, where the sources of memory effects in the PA itself are minimized through the proposed design methodology. Next, the principle of concurrent dual-band ET operation using the low frequency component (LFC) of the envelope of the dual-band signal is presented. The proposed dual-band ET PA modulates the drain voltage of the PA using the LFC of the envelope of the dual-band signal. This will enable concurrent dual-band operation of the ET PA without posing extra bandwidth requirements on the envelope amplifier. A detailed efficiency and linearity analysis of the dual-band ET PA is also presented. Furthermore, a new dual-band DPD model with supply dependency is proposed in this thesis, capable of capturing and compensating for the sources of distortion in the dual-band ET PA. To the best of our knowledge, concurrent dual-band operation of ET PAs using the LFC of the envelope of the dual-band signal is presented for the first time in the literature. The proposed dual-band ET operation is validated using the measurement results of two GaN ET PA prototypes. Lastly, the principle of concurrent dual-band ET operation is extended to multi-band signals using the LFC of the envelope of the multi-band signal. The proposed multi-band ET operation is validated using the measurement results of a tri-band ET PA. To the best of our knowledge, this is the first reported tri-band ET PA in literature. The tri-band ET PA is linearized using a new tri-band DPD model with supply dependency.




Design of a Power Amplifier and Envelope Amplifier for a Multi-band Multi-standard Envelope Tracking System


Book Description

This thesis presents the design of a Power Amplifier (PA) and envelope amplifier for an Envelope Tracking (ET) system that is aimed at meeting emerging radio standards in terms of power efficiency and linearity. The class J mode of operation, as well as the efficiency and power contours from load pull was exploited to develop an adequate procedure for the design of a broadband and high efficiency radio frequency PA. An in-depth study has also been conducted for a hybrid envelope amplifier topology in order to optimize it for power efficiency through proper setting of its switching stage supply. Two separate proof of concept prototypes of the PA and envelop amplifier were designed, fabricated and tested. The PA designed was able to achieve an average drain efficiency of 73.6%, average output power of 45.89dBm, and an average gain of 18dB between 650MHz and 1.050GHz (48% bandwidth). The envelope amplifier achieved close to 74.6% efficiency for a 5MHz bandwidth LTE signal envelope with 6.4dB peak to average power ratio.




System Modeling of CMOS Power Amplifier Employing Envelope and Average Power Tracking for Efficiency Enhancement


Book Description

In the past decade, there has been great motivation to improve the efficiency of power amplifiers (PAs) in handset transmitter systems in order to address critical issues such as poor battery life and excessive heat. Currently, the focus lies on high data rate applications such as wideband code division multiple access (WCDMA) and long term evolution (LTE) standards due to the stringent efficiency and linearity requirements on the PA. This thesis describes a simulation-based study of techniques for enhancing the efficiency of a CMOS power amplifier for WCDMA and LTE applications. The primary goal is to study the concepts of envelope and average power tracking in simulation and to demonstrate the effectiveness of these supply modulation techniques on a CMOS PA design. The P1dB and IMD performance of a Class A/AB CMOS PA has been optimized to operate with high peak-to-average modulation with WCDMA and LTE signals. Behavioral models of envelope and average power tracking are implemented using proposed algorithms, and a system-level analysis is performed. Envelope tracking is seen to offer a peak PAE improvement of 15% for WCDMA, versus a fixed voltage supply, while average power tracking renders a maximum efficiency gain of 9.8%. Better than -33dBc adjacent channel leakage-power ratio (ACLR) at 5MHz offset and EVM below 4% are observed for both supply tracking techniques. For LTE, envelope and average power tracking contribute to a peak PAE enhancement of 15.3% and 7%, respectively. LTE ACLR begins failing the -30dBc specification above 22.5dBm output power during envelope tracking operation in the PA implementation described here.




Power Amplifier Design


Book Description

Annotation This design guide collects 21 articles published in between 1989 and 2001, enabling readers to review classic theory as well as stay abreast of new technology. Coverage includes the specification, analysis, and measurement of distortion from various perspectives; predistortion techniques; and practical designs, including the magnetron, biasing LDMOS FETs for linear operation, the RF power transistor, and a push-pull 300-watt amplifier for 81.36 MHZ. Each article includes references. There is no index. Annotation c. Book News, Inc., Portland, OR (booknews.com).




Millimeter-Wave Circuits for 5G and Radar


Book Description

Discover the concepts, architectures, components, tools, and techniques needed to design millimeter-wave circuits for current and emerging wireless system applications. Focusing on applications in 5G, connectivity, radar, and more, leading experts in radio frequency integrated circuit (RFIC) design provide a comprehensive treatment of cutting-edge physical-layer technologies for radio frequency (RF) transceivers - specifically RF, analog, mixed-signal, and digital circuits and architectures. The full design chain is covered, from system design requirements through to building blocks, transceivers, and process technology. Gain insight into the key novelties of 5G through authoritative chapters on massive MIMO and phased arrays, and learn about the very latest technology developments, such as FinFET logic process technology for RF and millimeter-wave applications. This is an essential reading and an excellent reference for high-frequency circuit designers in both academia and industry.