Book Description
Deep learning based on neural networks emerged as a robust solution to various complex problems such as speech recognition and visual recognition. Deep learning relies on a great amount of iterative computation on a huge dataset. As we need to transfer a large amount of data and program between the CPU and the memory unit, the data transfer rate through a bus becomes a limiting factor for computing speed, which is known as Von Neumann bottleneck. Moreover, the data transfer between memory and computation spends a large amount of energy and cause significant delay. To overcome the limitation of Von Neumann bottleneck, neuromorphic computing with emerging nonvolatile memory (eNVM) devices has been proposed to perform iterative calculations in memory without transferring data to a processor. This dissertation presents energy efficient hardware implementation of neuromorphic computing applications using phase change memory (PCM), subquantum conductive bridge random access memory (CBRAM), Ag-based CBRAM, and CuOx-based resistive random access memory (RRAM). Although substantial progress has been made towards in-memory computing with synaptic devices, compact nanodevices implementing non-linear activation functions for efficient full-hardware implementation of deep neural networks is still missing. Since DNNs need to have a very large number of activations to achieve high accuracy, it is critical to develop energy and area efficient implementations of activation functions, which can be integrated on the periphery of the synaptic arrays. In this dissertation, we demonstrate a Mott activation neuron that implements the rectified linear unit function in the analogue domain. The integration of Mott activation neurons with a CBRAM crossbar array is also demonstrated in this dissertation.
