Germanium Photodetectors on Amorphous Substrates for Electronic-photonic Integration


Book Description

Silicon photonics has emerged as a leading technology to overcome the bandwidth and energy efficiency bottlenecks of standard metal interconnects. Integration of photonics in the back-end-of-line (BEOL) of a standard CMOS process enables the advantages of optical interconnects while benefiting from the low cost of monolithic integration. However, processing in the BEOL requires device fabrication on amorphous substrates, and constrains processing to 450C. In this thesis, a germanium photodetector is fabricated while adhering to these processing constraints in order to demonstrate a proof of concept for BEOL integration. In order to obtain high quality active material, crystalline Ge was grown on Si0 2 by implementing selective deposition in geometrically confined channels. The emerging Ge grains were coalesced to fill a lithographically defined trench, forming the active area of a photodetector. The Ge was measured to have a significant tensile strain of 0.5 %, which was caused by thermal expansion mismatch with the substrate, and concentrated by small voids from imperfect coalescence. The associated resolved shear stress was determined to be below the critical resolved shear stress, verifying that dislocation generation does not occur in this material. The strain was shown to increase the absorption of Ge at long wavelengths, allowing for implementation along the entire telecom window. A Schottky barrier to p-type Ge was developed by the addition of a 1 nm tunneling A120 3 layer between an Al/Ge metal contact. This successfully de-pinned the Fermi level, creating a barrier height of 0.46 eV. The Schottky contacts enabled the fabrication of metal-semiconductor-metal (MSM) photodetectors on standard epitaxial Ge with state-of-the-art dark current densities of 2.1 x 10-2 A cm-2. Gain was observed in these photodetectors, with internal quantum efficiencies (IQE) of 405 %. MSM detectors were also made using Ge on Si0 2, exhibiting an IQE of 370 %. This is the first demonstration of IQE 100% in a Ge MSM or pin photodetector and proves the feasibility of making high performance active photonic devices while adhering to BEOL processing constraints.




Photonics and Electronics with Germanium


Book Description

Representing a further step towards enabling the convergence of computing and communication, this handbook and reference treats germanium electronics and optics on an equal footing. Renowned experts paint the big picture, combining both introductory material and the latest results. The first part of the book introduces readers to the fundamental properties of germanium, such as band offsets, impurities, defects and surface structures, which determine the performance of germanium-based devices in conjunction with conventional silicon technology. The second part covers methods of preparing and processing germanium structures, including chemical and physical vapor deposition, condensation approaches and chemical etching. The third and largest part gives a broad overview of the applications of integrated germanium technology: waveguides, photodetectors, modulators, ring resonators, transistors and, prominently, light-emitting devices. An invaluable one-stop resource for both researchers and developers.




Single-crystal Germanium Growth on Amorphous Silicon


Book Description

The integration of photonics with electronics has emerged as a leading platform for microprocessor technology and the continuation of Moore's Law. As electronic device dimensions shrink, electronic signals encounter crippling delays and heating issues such that signal transduction across large on-chip distances becomes increasingly more difficult. However, these issues may be mitigated by the use of photonic interconnects combined with electronic devices in electronic-photonic integrated circuits (EPICs). The electronics in proposed EPIC designs perform the logic operations and short-distance signal transmission, while photonic devices serve to transmit signals over longer lengths. However, the photonic devices are large compared to electronic devices, and thus the two types of devices would ideally exist on separate levels of the microprocessor stack in order to maximize the amount of silicon substrate available for electronic device fabrication. A CMOS-compatible back-end process for the fabrication of photonic devices is necessary to realize such a three-dimensional EPIC. Back-end processing is limited in thermal budget and does not present a single-crystal substrate for epitaxial growth, however, so high-quality crystal fabrication methods currently used for photonic device fabrication are not possible in back-end processing. This thesis presents a method for the fabrication of high-quality germanium single crystals using CMOS-compatible back-end processing. Initial work on the ultra-high vacuum chemical vapor deposition of polycrystalline germanium on amorphous silicon is presented. The deposition can be successfully performed by using a pre-growth hydrofluoric acid dip and by limiting the thickness of the amorphous silicon layer to less than 120 nm. Films deposited at temperatures of 350° C, 450° C, and 550° C show (110) texture, though the texture is most prevalent in growths at 450° C. Poly-Ge grown at 4500 C is successfully doped n-type in situ, and the grain size of as-grown material is enhanced by lateral growth over a barrier. Structures are fabricated for the growth of Ge confined in one dimension. The growths show faceting across large areas, in contrast to as-deposited poly-Ge, corresponding to enhanced grain sizes. Growth confinement is shown to reduce the defect density as the poly-Ge grows. When coalesced into a continuous film, the material grown from 1 D confinement exhibits a lower carrier density and lower trap density than as-deposited poly-Ge, indicating improved material quality. We measure an increased grain size from as-deposited poly-Ge to Ge grown from ID confinement. Single-crystal germanium is grown at 450° C from confinement in two dimensions. Such growths exhibit faceting across the entire crystal as well as the presence of E3 boundaries ({111} twins), with many growths showing no other boundaries. These twins mediate the growth of the crystal, as they serve as the points for heterogeneous surface nucleation of adatom clusters. The twins can form after the crystal nucleates and are strongly preferred in order to obtain appreciable crystal growth rates. We model the growths from the confining channels in order to find the optimum channel geometry for large, uniform, single-crystal growths that consistently emerge from the channel. The growths from 2D confinement show lower trap density than those from 1 D confinement, indicating a further enhancement of the crystal quality due to the increased confinement. This method of single-crystal growth from an amorphous substrate is extensible to any materials system in which selective non-epitaxial deposition is possible.




Electronic Structure of Amorphous and Crystalline Germanium: Photoemission and Optical Studies


Book Description

Photoemission has been measured in the 1.8 - 11.8 eV spectral range for cleaved single crystal Ge and amorphous Ge films. Cesium was used to lower the photoelectric threshold and extend the measurements for photon energies less than 5 eV for both phases. Similar measurements were made in the 5 - 11.8 eV spectral range on films grown at room temperature (i.e., amorphous films) and then annealed at temperatures below and above the amorphous-crystalline transition temperature. The optical properties for amorphous films have been determined in the 0.1 - 25.0 eV spectral range from a Kramers-Kronig analysis of reflectance data and in the infrared and absorption edge region for films grown on substrates held at temperatures just below the amorphous-crystalline transition temperature. (Author).




Integrated Optical Interconnect Architectures for Embedded Systems


Book Description

This book provides a broad overview of current research in optical interconnect technologies and architectures. Introductory chapters on high-performance computing and the associated issues in conventional interconnect architectures, and on the fundamental building blocks for integrated optical interconnect, provide the foundations for the bulk of the book which brings together leading experts in the field of optical interconnect architectures for data communication. Particular emphasis is given to the ways in which the photonic components are assembled into architectures to address the needs of data-intensive on-chip communication, and to the performance evaluation of such architectures for specific applications.




Photonic Devices


Book Description

Photonic devices lie at the heart of the communications revolution, and have become a large and important part of the electronic engineering field, so much so that many colleges now treat this as a subject in its own right. With this in mind, the author has put together a unique textbook covering every major photonic device, and striking a careful balance between theoretical and practical concepts. The book assumes a basic knowledge of optics, semiconductors and electromagnetic waves. Many of the key background concepts are reviewed in the first chapter. Devices covered include optical fibers, couplers, electro-optic devices, magneto-optic devices, lasers and photodetectors. Problems are included at the end of each chapter and a solutions set is available. The book is ideal for senior undergraduate and graduate courses, but being device driven it is also an excellent engineers' reference.




Advanced Interconnects for ULSI Technology


Book Description

Finding new materials for copper/low-k interconnects is critical to the continuing development of computer chips. While copper/low-k interconnects have served well, allowing for the creation of Ultra Large Scale Integration (ULSI) devices which combine over a billion transistors onto a single chip, the increased resistance and RC-delay at the smaller scale has become a significant factor affecting chip performance. Advanced Interconnects for ULSI Technology is dedicated to the materials and methods which might be suitable replacements. It covers a broad range of topics, from physical principles to design, fabrication, characterization, and application of new materials for nano-interconnects, and discusses: Interconnect functions, characterisations, electrical properties and wiring requirements Low-k materials: fundamentals, advances and mechanical properties Conductive layers and barriers Integration and reliability including mechanical reliability, electromigration and electrical breakdown New approaches including 3D, optical, wireless interchip, and carbon-based interconnects Intended for postgraduate students and researchers, in academia and industry, this book provides a critical overview of the enabling technology at the heart of the future development of computer chips.




Semiconductor Devices for Optical Communication


Book Description

With contributions by numerous experts




Silicon-On-Insulator (SOI) Technology


Book Description

Silicon-On-Insulator (SOI) Technology: Manufacture and Applications covers SOI transistors and circuits, manufacture, and reliability. The book also looks at applications such as memory, power devices, and photonics. The book is divided into two parts; part one covers SOI materials and manufacture, while part two covers SOI devices and applications. The book begins with chapters that introduce techniques for manufacturing SOI wafer technology, the electrical properties of advanced SOI materials, and modeling short-channel SOI semiconductor transistors. Both partially depleted and fully depleted SOI technologies are considered. Chapters 6 and 7 concern junctionless and fin-on-oxide field effect transistors. The challenges of variability and electrostatic discharge in CMOS devices are also addressed. Part two covers recent and established technologies. These include SOI transistors for radio frequency applications, SOI CMOS circuits for ultralow-power applications, and improving device performance by using 3D integration of SOI integrated circuits. Finally, chapters 13 and 14 consider SOI technology for photonic integrated circuits and for micro-electromechanical systems and nano-electromechanical sensors. The extensive coverage provided by Silicon-On-Insulator (SOI) Technology makes the book a central resource for those working in the semiconductor industry, for circuit design engineers, and for academics. It is also important for electrical engineers in the automotive and consumer electronics sectors. - Covers SOI transistors and circuits, as well as manufacturing processes and reliability - Looks at applications such as memory, power devices, and photonics




Advances in Optical Fiber Technology


Book Description

This book is a compilation of works presenting recent developments and practical applications in optical fiber technology. It contains 13 chapters from various institutions that represent global research in various topics such as scattering, dispersion, polarization interference, fuse phenomena and optical manipulation, optical fiber laser and sensor applications, passive optical network (PON) and plastic optical fiber (POF) technology. It provides the reader with a broad overview and sampling of the innovative research on optical fiber technologies.