Many-core Architectures with Time Predictable Execution Support for Hard Real-time Applications


Book Description

Hybrid control systems are a growing domain of application. They are pervasive and their complexity is increasing rapidly. Distributed control systems for future "Intelligent Grid" and renewable energy generation systems are demanding high-performance, hard real-time computation, and more programmability. General-purpose computer systems are primarily designed to process data and not to interact with physical processes as required by these systems. Generic general-purpose architectures even with the use of real-time operating systems fail to meet the hard realtime constraints of hybrid system dynamics. ASIC, FPGA, or traditional embedded design approaches to these systems often result in expensive, complicated systems that are hard to program, reuse, or maintain. In this thesis, we propose a domain-specific architecture template targeting hybrid control system applications. Using power electronics control applications, we present new modeling techniques, synthesis methodologies, and a parameterizable computer architecture for these large distributed control systems. We propose a new system modeling approach, called Adaptive Hybrid Automaton, based on previous work in control system theory, that uses a mixed-model abstractions and lends itself well to digital processing. We develop a domain-specific architecture based on this modeling that uses heterogeneous processing units and predictable execution, called MARTHA. We develop a hard real-time aware router architecture to enable deterministic on-chip interconnect network communication. We present several algorithms for scheduling task-based applications onto these types of heterogeneous architectures. We create Heracles, an open-source, functional, parameterized, synthesizable many-core system design toolkit, that can be used to explore future multi/many-core processors with different topologies, routing schemes, processing elements or cores, and memory system organizations. Using the Heracles design tool we build a prototype of the proposed architecture using a state-of-the-art FPGA-based platform, and deploy and test it in actual physical power electronics systems. We develop and release an open-source, small representative set of power electronics system applications that can be used for hard real-time application benchmarking.




Invasive Computing for Mapping Parallel Programs to Many-Core Architectures


Book Description

This book provides an overview of and essential insights on invasive computing. Pursuing a comprehensive approach, it addresses proper concepts, invasive language constructs, and the principles of invasive hardware. The main focus is on the important topic of how to map task-parallel applications to future multi-core architectures including 1,000 or more processor units. A special focus today is the question of how applications can be mapped onto such architectures while not only taking into account functional correctness, but also non-functional execution properties such as execution times and security properties. The book provides extensive experimental evaluations, investigating the benefits of applying invasive computing and hybrid application mapping to give guarantees on non-functional properties such as timing, energy, and security. The techniques in this book are presented in a step-by-step manner, supported by examples and figures. All proposed ideas for providing guarantees on performance, energy consumption, and security are enabled by using the concept of invasive computing and the exclusive usage of resources.




Architecture of Computing Systems – ARCS 2015


Book Description

This book constitutes the proceedings of the 28th International Conference on Architecture of Computing Systems, ARCS 2015, held in Porto, Portugal, in March 2015. The 19 papers presented together with three invited papers were carefully reviewed and selected from 45 submissions. The papers are organized in six sessions covering the topics: hardware, design, applications, trust and privacy, real-time issues and a best papers session.




Architecture of Computing Systems - ARCS 2017


Book Description

This book constitutes the proceedings of the 30th International Conference on Architecture of Computing Systems, ARCS 2017, held in Vienna, Austria, in April 2017. The 19 full papers presented in this volume were carefully reviewed and selected from 42 submissions. They were organized in topical sections entitled: resilience; accelerators; performance; memory systems; parallelism and many-core; scheduling; power/energy.




Memory Controllers for Real-Time Embedded Systems


Book Description

Verification of real-time requirements in systems-on-chip becomes more complex as more applications are integrated. Predictable and composable systems can manage the increasing complexity using formal verification and simulation. This book explains the concepts of predictability and composability and shows how to apply them to the design and analysis of a memory controller, which is a key component in any real-time system.




Parallel Computing


Book Description

From Multicores and GPUs to Petascale. Parallel computing technologies have brought dramatic changes to mainstream computing the majority of todays PCs, laptops and even notebooks incorporate multiprocessor chips with up to four processors. Standard components are increasingly combined with GPUs Graphics Processing Unit, originally designed for high-speed graphics processing, and FPGAs Free Programmable Gate Array to build parallel computers with a wide spectrum of high-speed processing functions. The scale of this powerful hardware is limited only by factors such as energy consumption and thermal control. However, in addition to"










Principles of Asynchronous Circuit Design


Book Description

Principles of Asynchronous Circuit Design - A Systems Perspective addresses the need for an introductory text on asynchronous circuit design. Part I is an 8-chapter tutorial which addresses the most important issues for the beginner, including how to think about asynchronous systems. Part II is a 4-chapter introduction to Balsa, a freely-available synthesis system for asynchronous circuits which will enable the reader to get hands-on experience of designing high-level asynchronous systems. Part III offers a number of examples of state-of-the-art asynchronous systems to illustrate what can be built using asynchronous techniques. The examples range from a complete commercial smart card chip to complex microprocessors. The objective in writing this book has been to enable industrial designers with a background in conventional (clocked) design to be able to understand asynchronous design sufficiently to assess what it has to offer and whether it might be advantageous in their next design task.




Real-Time Systems Design and Analysis


Book Description

"IEEE Press is pleased to bring you this Second Edition of Phillip A. Laplante's best-selling and widely-acclaimed practical guide to building real-time systems. This book is essential for improved system designs, faster computation, better insights, and ultimate cost savings. Unlike any other book in the field, REAL-TIME SYSTEMS DESIGN AND ANALYSIS provides a holistic, systems-based approach that is devised to help engineers write problem-solving software. Laplante's no-nonsense guide to real-time system design features practical coverage of: Related technologies and their histories Time-saving tips * Hands-on instructions Pascal code Insights into decreasing ramp-up times and more!"