Materials, Technology and Reliability for Advanced Interconnects and Low-K Dielectrics - 2004


Book Description

The scaling of device dimensions with a simultaneous increase in functional density has imposed tremendous challenges for materials, technology, integration and reliability of interconnects. To meet requirements of the ITRS roadmap, new materials are being introduced at a faster pace in all functions of multilevel interconnects. The issues addressed in this book cannot be dispelled as simply selecting a low-k material and integrating it into a copper damascene process. The intricacies of the back end for sub-100nm technology include novel processing of low-k materials, employing pore-sealing techniques and capping layers, introducing advanced dielectric and diffusion barriers, and developing novel integration schemes. This is in addition to concerns of performance, yield, and reliability appropriate to nanoscaled interconnects. Although many challenges continue to impede progress along the ITRS roadmap, the contributions in this book confront them head-on. It provides a scientific understanding of the issues and stimulate new approaches to advanced multilevel interconnects.










Advanced Interconnects for ULSI Technology


Book Description

Finding new materials for copper/low-k interconnects is critical to the continuing development of computer chips. While copper/low-k interconnects have served well, allowing for the creation of Ultra Large Scale Integration (ULSI) devices which combine over a billion transistors onto a single chip, the increased resistance and RC-delay at the smaller scale has become a significant factor affecting chip performance. Advanced Interconnects for ULSI Technology is dedicated to the materials and methods which might be suitable replacements. It covers a broad range of topics, from physical principles to design, fabrication, characterization, and application of new materials for nano-interconnects, and discusses: Interconnect functions, characterisations, electrical properties and wiring requirements Low-k materials: fundamentals, advances and mechanical properties Conductive layers and barriers Integration and reliability including mechanical reliability, electromigration and electrical breakdown New approaches including 3D, optical, wireless interchip, and carbon-based interconnects Intended for postgraduate students and researchers, in academia and industry, this book provides a critical overview of the enabling technology at the heart of the future development of computer chips.




Copper Interconnect Technology


Book Description

Since overall circuit performance has depended primarily on transistor properties, previous efforts to enhance circuit and system speed were focused on transistors as well. During the last decade, however, the parasitic resistance, capacitance, and inductance associated with interconnections began to influence circuit performance and will be the primary factors in the evolution of nanoscale ULSI technology. Because metallic conductivity and resistance to electromigration of bulk copper (Cu) are better than aluminum, use of copper and low-k materials is now prevalent in the international microelectronics industry. As the feature size of the Cu-lines forming interconnects is scaled, resistivity of the lines increases. At the same time electromigration and stress-induced voids due to increased current density become significant reliability issues. Although copper/low-k technology has become fairly mature, there is no single book available on the promise and challenges of these next-generation technologies. In this book, a leader in the field describes advanced laser systems with lower radiation wavelengths, photolithography materials, and mathematical modeling approaches to address the challenges of Cu-interconnect technology.







Dielectrics for Nanosystems


Book Description




Low Dielectric Constant Materials for IC Applications


Book Description

Low dielectric constant materials are an important component of microelectronic devices. This comprehensive book covers the latest low-dielectric-constant (low-k) materials technology, thin film materials characterization, integration and reliability for back-end interconnects and packaging applications in microelectronics. Highly informative contributions from leading academic and industrial laboratories provide comprehensive information about materials technologies for




Handbook of Semiconductor Manufacturing Technology


Book Description

Retaining the comprehensive and in-depth approach that cemented the bestselling first edition's place as a standard reference in the field, the Handbook of Semiconductor Manufacturing Technology, Second Edition features new and updated material that keeps it at the vanguard of today's most dynamic and rapidly growing field. Iconic experts Robert Doering and Yoshio Nishi have again assembled a team of the world's leading specialists in every area of semiconductor manufacturing to provide the most reliable, authoritative, and industry-leading information available. Stay Current with the Latest Technologies In addition to updates to nearly every existing chapter, this edition features five entirely new contributions on... Silicon-on-insulator (SOI) materials and devices Supercritical CO2 in semiconductor cleaning Low-κ dielectrics Atomic-layer deposition Damascene copper electroplating Effects of terrestrial radiation on integrated circuits (ICs) Reflecting rapid progress in many areas, several chapters were heavily revised and updated, and in some cases, rewritten to reflect rapid advances in such areas as interconnect technologies, gate dielectrics, photomask fabrication, IC packaging, and 300 mm wafer fabrication. While no book can be up-to-the-minute with the advances in the semiconductor field, the Handbook of Semiconductor Manufacturing Technology keeps the most important data, methods, tools, and techniques close at hand.




Probing Crystal Plasticity at the Nanoscales


Book Description

This Brief highlights the search for strain gradients and geometrically necessary dislocations as a possible source of strength for two cases of deformation of materials at small scales: nanoindented single crystal copper and uniaxially compressed single crystal submicron gold pillars. When crystalline materials are mechanically deformed in small volumes, higher stresses are needed for plastic flow. This has been called the "Smaller is Stronger" phenomenon and has been widely observed. studies suggest that plasticity in one case is indeed controlled by the GNDs (strain gradient hardening), whereas in the other, plasticity is not controlled by strain gradients or sub-structure hardening, but rather by dislocation source starvation, wherein smaller volumes are stronger because fewer sources of dislocations are available (dislocation starvation hardening).