Method for Shallow Junction Formation


Book Description

A doping sequence that reduces the cost and complexity of forming source/drain regions in complementary metal oxide silicon (CMOS) integrated circuit technologies. The process combines the use of patterned excimer laser annealing, dopant-saturated spin-on glass, silicide contact structures and interference effects creates by thin dielectric layers to produce source and drain junctions that are ultrashallow in depth but exhibit low sheet and contact resistance. The process utilizes no photolithography and can be achieved without the use of expensive vacuum equipment. The process margins are wide, and yield loss due to contact of the ultrashallow dopants is eliminated.
















Comprehensive Semiconductor Science and Technology


Book Description

Semiconductors are at the heart of modern living. Almost everything we do, be it work, travel, communication, or entertainment, all depend on some feature of semiconductor technology. Comprehensive Semiconductor Science and Technology, Six Volume Set captures the breadth of this important field, and presents it in a single source to the large audience who study, make, and exploit semiconductors. Previous attempts at this achievement have been abbreviated, and have omitted important topics. Written and Edited by a truly international team of experts, this work delivers an objective yet cohesive global review of the semiconductor world. The work is divided into three sections. The first section is concerned with the fundamental physics of semiconductors, showing how the electronic features and the lattice dynamics change drastically when systems vary from bulk to a low-dimensional structure and further to a nanometer size. Throughout this section there is an emphasis on the full understanding of the underlying physics. The second section deals largely with the transformation of the conceptual framework of solid state physics into devices and systems which require the growth of extremely high purity, nearly defect-free bulk and epitaxial materials. The last section is devoted to exploitation of the knowledge described in the previous sections to highlight the spectrum of devices we see all around us. Provides a comprehensive global picture of the semiconductor world Each of the work's three sections presents a complete description of one aspect of the whole Written and Edited by a truly international team of experts




Rapid Thermal and Other Short-time Processing Technologies


Book Description

The proceedings from this May 2000 symposium illustrate the range of applications in Rapid Thermal Processing (RTP). The refereed papers cover a variety of issues, such as ultra-shallow junctions; contacts for nanoscale CMOS; gate stacks; new applications of RTP, such as for the enhanced crystalization of amorphous silicon thin films; and advances on RTP systems and process monitoring, including optimizing and controlling gas flows in an RTCVD reactor. Most presentations are supported by charts and other graphical data. c. Book News Inc.




Silicon Front-end Junction Formation Technologies


Book Description

Unlike the previous three volumes in the series on silicon front-end processing, this volume expands its focus to include more topics related to formation of ultrashallow junctions. With the challenges presented by the requirements of the sub- 100nm node, the need for new activation technologies which yield minimal diffusion of the dopant while producing high activation are paramount. In addition, the metrology required to measure these shallow profiles in both one and two dimensions becomes more critical. The volume attempts to address these new requirements and potential solutions by covering a variety of topics that include: alternate annealing technologies; device engineering options; dopant activation; epitaxial techniques primarily employing SiGe; defect and diffusion models; characterization using surface analysis techniques; and characterization technologies.