Resistive Random Access Memory Device Scaling and Integration with Complementary Metal-oxide-semiconductor


Book Description

Resistive random access memory (RRAM) is a promising candidate to meet future density and power challenges. RRAM has fast switching speed, low programming power, and many other advantages. However, there are still a few imperative issues to be tackled before RRAM can compete with, and eventually, replace flash or other memory technologies. This dissertation explores two issues: 1) RRAM scaling potential below 10 nm and 2) integration of RRAM with complementary metal-oxide-semiconductor (CMOS), which leads to the first threedimensional (3D) field programmable gate array (FPGA) based on RRAM.




3D Integration of Resistive Switching Memory


Book Description

This book offers a thorough exploration of the three-dimensional integration of resistive memory in all aspects, from the materials, devices, array-level issues, and integration structures to its applications. Resistive random-access memory (RRAM) is one of the most promising candidates for next-generation nonvolatile memory applications owing to its superior characteristics including simple structure, high switching speed, low power consumption, and compatibility with standard complementary metal oxide semiconductor (CMOS) process. To achieve large-scale, high-density integration of RRAM, the 3D cross array is undoubtedly the ideal choice. This book introduces the 3D integration technology of RRAM, and breaks it down into five parts: 1: Associative Problems in Crossbar array and 3D architectures; 2: Selector Devices and Self-Selective Cells; 3: Integration of 3D RRAM; 4: Reliability Issues in 3D RRAM; 5: Applications of 3D RRAM beyond Storage. The book aspires to provide a relevant reference for students, researchers, engineers, and professionals working with resistive random-access memory or those interested in 3D integration technology in general.




Resistive Random Access Memory (RRAM)


Book Description

RRAM technology has made significant progress in the past decade as a competitive candidate for the next generation non-volatile memory (NVM). This lecture is a comprehensive tutorial of metal oxide-based RRAM technology from device fabrication to array architecture design. State-of-the-art RRAM device performances, characterization, and modeling techniques are summarized, and the design considerations of the RRAM integration to large-scale array with peripheral circuits are discussed. Chapter 2 introduces the RRAM device fabrication techniques and methods to eliminate the forming process, and will show its scalability down to sub-10 nm regime. Then the device performances such as programming speed, variability control, and multi-level operation are presented, and finally the reliability issues such as cycling endurance and data retention are discussed. Chapter 3 discusses the RRAM physical mechanism, and the materials characterization techniques to observe the conductive filaments and the electrical characterization techniques to study the electronic conduction processes. It also presents the numerical device modeling techniques for simulating the evolution of the conductive filaments as well as the compact device modeling techniques for circuit-level design. Chapter 4 discusses the two common RRAM array architectures for large-scale integration: one-transistor-one-resistor (1T1R) and cross-point architecture with selector. The write/read schemes are presented and the peripheral circuitry design considerations are discussed. Finally, a 3D integration approach is introduced for building ultra-high density RRAM array. Chapter 5 is a brief summary and will give an outlook for RRAM’s potential novel applications beyond the NVM applications.




3D Integration of Resistive Switching Memory


Book Description

"This book offers a thorough exploration of the three-dimensional integration of resistive memory in all aspects, from the materials, devices, array-level issues, and integration structures, to its applications. Resistive random-access memory (RRAM) is one of the most promising candidates for next-generation nonvolatile memory applications owing to its superior characteristics including simple structure, high switching speed, low power consumption, and compatibility with standard complementary metal oxide semiconductor (CMOS) process. To achieve large-scale, high-density integration of RRAM, the 3D cross array is undoubtedly the ideal choice. This book introduces the 3D integration technology of RRAM, and breaks it down into five parts: 1: Associative Problems in Crossbar array and 3D architectures; 2: Selector Devices and Self-selective cells; 3: Integration of 3D RRAM; 4: Reliability Issues in 3D RRAM; 5: Applications of 3D RRAM Beyond Storage. The book aspires to provide a relevant reference for students, researchers, engineers, and professionals working with resistive random-access memory or those interested in 3D integration technology in general"--




Resistive Switching


Book Description

With its comprehensive coverage, this reference introduces readers to the wide topic of resistance switching, providing the knowledge, tools, and methods needed to understand, characterize and apply resistive switching memories. Starting with those materials that display resistive switching behavior, the book explains the basics of resistive switching as well as switching mechanisms and models. An in-depth discussion of memory reliability is followed by chapters on memory cell structures and architectures, while a section on logic gates rounds off the text. An invaluable self-contained book for materials scientists, electrical engineers and physicists dealing with memory research and development.







Nanoelectronics for Next-Generation Integrated Circuits


Book Description

The incessant scaling of complementary metal-oxide semiconductor (CMOS) technology has resulted in significant performance improvements in very-large-scale integration (VLSI) design techniques and system architectures. This trend is expected to continue in the future, but this requires breakthroughs in the design of nano-CMOS and post-CMOS technologies. Nanoelectronics refers to the possible future technologies beyond conventional CMOS scaling limits. This volume addresses the current state-of-the-art nanoelectronic technologies and presents potential options for next-generation integrated circuits. Nanoelectronics for Next-generation Integrated Circuits is a useful reference guide for researchers, engineers, and advanced students working on the frontier of the design and modeling of nanoelectronic devices and their integration aspects with future CMOS circuits. This comprehensive volume eloquently presents the design methodologies for spintronics memories, quantum-dot cellular automata, and post-CMOS FETs, including applications in emerging integrated circuit technologies.




Intrinsic Unipolar SiOx-based Resistive Switching Memory


Book Description

Floating gate (FG) nonvolatile memory has been the main structure of nonvolatile memory devices, since its invention in 1967 by D. Kahng and S. M. Sze. They have been widely employed in the portable electronic products such as mobile phones, digital cameras, notebook computers, mp3 players and USB flash drives. However, as device size continues to shrink, the typical flash memory device will continue to suffer from issues of retention and endurance. In order to solve the problems, researchers have considered new storage layers and novel structures in nonvolatile memory devices to replace the conventional floating gate device. Therefore, a great deal of potential memory structures have been proposed, with some transferring into a production line, such as phase change memory (PCM), magnetic random access memory (MRAM) and ferroelectric random access memory (FeRAM). In the innovation of memory devices, resistance random access memories (ReRAMs) have gained significant research interest as an alternative for next-generation nonvolatile memory due to its high density, low cost, low power consumption, fast switching speed and simple cell structure. In this dissertation, the intrinsic unipolar silicon oxide (SiOx-based) Resistive-RAM (ReRAM) characterization, mechanism and applications have been presented. I investigate device structures, material compositions and electrical characteristics to realize ReRAM cells with high ON/OFF ratio, low static power consumption, low switching power, and high readout-margin using complementary metal-oxide-semiconductor (CMOS) compatible SiOx-based materials. These ideas are combined with the use of horizontal and vertical device structure designs, composition optimization, electrical controlling and external factors for understanding resistive switching mechanism. Modeling of resistive switching mechanism, including temperature effect, pulse response and carrier transport behaviors are performed, to develop a compact model in energy diagram, trap-level information in SiOx resistive switching layer, even for computer-aided design (CAD) in very-large-scale integration (VLSI) design. Finally, synapse-based neuromorphic system is demonstrated in SiOx-based ReRAM, combining with bio-inspiration and biomimetics process illustrations. This work presents the comprehensively investigation of SiOx-based resistive switching characteristics, mechanisms, applications for future post-CMOS devices era.