3D Stacked Chips


Book Description

This book explains for readers how 3D chip stacks promise to increase the level of on-chip integration, and to design new heterogeneous semiconductor devices that combine chips of different integration technologies (incl. sensors) in a single package of the smallest possible size. The authors focus on heterogeneous 3D integration, addressing some of the most important challenges in this emerging technology, including contactless, optics-based, and carbon-nanotube-based 3D integration, as well as signal-integrity and thermal management issues in copper-based 3D integration. Coverage also includes the 3D heterogeneous integration of power sources, photonic devices, and non-volatile memories based on new materials systems.




Chips 2020


Book Description

The chips in present-day cell phones already contain billions of sub-100-nanometer transistors. By 2020, however, we will see systems-on-chips with trillions of 10-nanometer transistors. But this will be the end of the miniaturization, because yet smaller transistors, containing just a few control atoms, are subject to statistical fluctuations and thus no longer useful. We also need to worry about a potential energy crisis, because in less than five years from now, with current chip technology, the internet alone would consume the total global electrical power! This book presents a new, sustainable roadmap towards ultra-low-energy (femto-Joule), high-performance electronics. The focus is on the energy-efficiency of the various chip functions: sensing, processing, and communication, in a top-down spirit involving new architectures such as silicon brains, ultra-low-voltage circuits, energy harvesting, and 3D silicon technologies. Recognized world leaders from industry and from the research community share their views of this nanoelectronics future. They discuss, among other things, ubiquitous communication based on mobile companions, health and care supported by autonomous implants and by personal carebots, safe and efficient mobility assisted by co-pilots equipped with intelligent micro-electromechanical systems, and internet-based education for a billion people from kindergarden to retirement. This book should help and interest all those who will have to make decisions associated with future electronics: students, graduates, educators, and researchers, as well as managers, investors, and policy makers. Introduction: Towards Sustainable 2020 Nanoelectronics.- From Microelectronics to Nanoelectronics.- The Future of Eight Chip Technologies.- Analog–Digital Interfaces.- Interconnects and Transceivers.- Requirements and Markets for Nanoelectronics.- ITRS: The International Technology Roadmap for Semiconductors.- Nanolithography.- Power-Efficient Design Challenges.- Superprocessors and Supercomputers.- Towards Terabit Memories.- 3D Integration for Wireless Multimedia.- The Next-Generation Mobile User-Experience.- MEMS (Micro-Electro-Mechanical Systems) for Automotive and Consumer.- Vision Sensors and Cameras.- Digital Neural Networks for New Media.- Retinal Implants for Blind Patients.- Silicon Brains.- Energy Harvesting and Chip Autonomy.- The Energy Crisis.- The Extreme-Technology Industry.- Education and Research for the Age of Nanoelectronics.- 2020 World with Chips.




Future Generation Information Technology


Book Description

This book comprises selected papers of the 4th International Conference on Future Generation Information Technology, FGIT 2012, held in Gangneug, Korea, in December 2012. The papers presented were carefully reviewed and selected from numerous submissions and focus on the various aspects of advances in information technology. They were selected from the following 11 conferences: BSBT 2012, CGAG 2012, DCA 2012, DTA 2012, EL 2012, FGCN 2012, GDC 2012, IESH 2012, IUrC 2012, MulGraB 2012, and UNESST 2012.




MicroSystem Based on SiP Technology


Book Description

This book is a comprehensive SiP design guide book. It is divided into three parts: concept and technology, design and simulation, project and case, for a total of 30 chapters. In Part one, the author proposes some new original concepts and thoughts, such as Function Density Law,Si3P and 4D integration. Part one also covers the latest technology of SiP and Advanced Packaging. Part two covers the latest SiP and Advanced Packaging design and simulation technologies, such as wire bonding, multi-step cavity, chip stacking, 2.5D TSV, 3D TSV, RDL, Fan- In, Fan-Out, Flip Chip, Embedded Passive, Embedded Chip, RF design, Rigid-Flex design, 4D SiP design, Multi-layout project and Team design, as well as SI, PI, thermal simulation, electrical verification and physical verification. Based on a real design case, part three introduces the design, simulation and implementation methods of different types of SiP, which has a -important reference significance for the research and development of SiP projects. This book comprehensively and deeply expounds the latest development, design ideas and design methods of contemporary SiP technology from three aspects: concept and technology, design and simulation, project and case. Through the detailed introduction of new concepts, design methods, actual projects and cases, this book describes the whole process of SiP products from the beginning of conception to the final realization and makes readers benefit from it.




Ultra-thin Chip Technology and Applications


Book Description

Ultra-thin chips are the "smart skin" of a conventional silicon chip. This book shows how very thin and flexible chips can be fabricated and used in many new applications in microelectronics, Microsystems, biomedical and other fields. It provides a comprehensive reference to the fabrication technology, post processing, characterization and the applications of ultra-thin chips.




Wireless Interface Technologies for 3D IC and Module Integration


Book Description

Synthesising fifteen years of research, this authoritative text provides a comprehensive treatment of two major technologies for wireless chip and module interface design, covering technology fundamentals, design considerations and tradeoffs, practical implementation considerations, and discussion of practical applications in neural network, reconfigurable processors, and stacked SRAM. It explains the design principles and applications of two near-field wireless interface technologies for 2.5-3D IC and module integration respectively, and describes system-level performance benefits, making this an essential resource for researchers, professional engineers and graduate students performing research in next-generation wireless chip and module interface design.







Integrated Interconnect Technologies for 3D Nanoelectronic Systems


Book Description

This cutting-edge book on off-chip technologies puts the hottest breakthroughs in high-density compliant electrical interconnects, nanophotonics, and microfluidics at your fingertips, integrating the full range of mathematics, physics, and technology issues together in a single comprehensive source. You get full details on state-of-the-art I/O interconnects and packaging, including mechanically compliant I/O approaches, fabrication, and assembly, followed by the latest advances and applications in power delivery design, analysis, and modeling. The book explores interconnect structures, materials, and packages for achieving high-bandwidth off-chip electrical communication, including optical interconnects and chip-to-chip signaling approaches, and brings you up to speed on CMOS integrated optical devices, 3D integration, wafer stacking technology, and through-wafer interconnects.




Designing Network On-Chip Architectures in the Nanoscale Era


Book Description

Going beyond isolated research ideas and design experiences, Designing Network On-Chip Architectures in the Nanoscale Era covers the foundations and design methods of network on-chip (NoC) technology. The contributors draw on their own lessons learned to provide strong practical guidance on various design issues.Exploring the design process of the