Advanced Multiphasing Switched-Capacitor DC-DC Converters


Book Description

This book gives a detailed analysis of switched-capacitor DC-DC converters that are entirely integrated on a single chip and establishes that these converters are mainly limited by the large parasitic coupling, the low capacitor energy density, and the fact that switched-capacitor converter topologies only have a fixed voltage conversion ratio. The authors introduce the concept of Advanced Multiphasing as a way to circumvent these limitations by having multiple out-of-phase parallel converter cores interact with each other to minimize capacitor charging losses, leading to several techniques that demonstrate record efficiency and power-density, and even a fundamentally new type of switched-capacitor topology that has a continuously-scalable conversion ratio. Provides single-source reference to the recently-developed Advanced Multiphasing concept; Enables greatly improved performance and capabilities in fully integrated switched-capacitor converters; Enables readers to design DC-DC converters, where multiple converter cores are put in parallel and actively interact with each other over several phases to improve their capabilities.




Hybrid Switched-capacitor Power Converter Techniques


Book Description

Power conversion is a necessity in almost all modern electric systems and machines: energy must be regulated and delivered in the intended manner if a system is to perform well, or at all. Power converters, the electronic circuits used to control this energy flow, have been a subject of intense study and rapid development in recent years and are widely acknowledged to be a fundamental enabler for modern day human societal capabilities. Many market sectors have strongly advocated for further development of energy conversion systems with improved efficiency and power density as these traits often directly dictate practical viability. While advancements in semiconductor device physics have yielded improved parts for use inconverter solutions, it is becoming apparent that there is additional massive potential and merit in revisiting fundamental converter topologies and circuit techniques. To date, power converters that use capacitors as their primary energy transfer elements (termed "switchedcapacitor" power converters) are far less ubiquitous than their switched-inductor counterparts, and seemingly for good reason: characteristics such as poor output regulation and intrinsic transient inrush currents that lead to inefficiency have largely prevented switched-capacitor topologies from gaining practical consideration in general power converter markets. Solutions to these negative attributes are strongly desired as capacitors can offer energy densities up to three orders of magnitude greater than inductors, with these energy transfer elements typically consuming the majority of a power converter's weight/volume. Recent work has demonstrated significant potential for hybrid switched-capacitor-inductor converter techniques: here, small inductive element(s) are used to eliminate the conventional drawbacks of a converter which is predominantly capacitor based. The hybridized approach helps unlock the full potential of capacitor-based converters and has been demonstrated to offer compelling results at the cost of added complexity. This work offers an exploration into a collection of state-of-the-art power converter techniques and topological methods, primarily within the field of hybridized switched-capacitor-inductor converters. The first two chapters give a background on fundamental considerations such as conventional loss mechanisms and the slow-switching-limit (SSL), as well as several established loss mitigation techniques. An integrated converter system and its associated functional blocks is then discussed in Chapters 3 and 4, exemplifying a hybridized two-stage converter and illustrating the implementation of several loss mitigation methods and practical circuit techniques. Next, several hybridized variations of the Dickson topology are discussed: this family of DC-DC converters is well suited for non-isolated large voltage conversion ratios. A number of these variants are proposed here for the first time, illustrating significant potential for further converter development. The steady-state bias points, resonant switching frequency, duty cycle and voltage ripple as a function of load are calculated for several example converters, including the non-trivial case of a converter undergoing split-phase operation and whose operating points exhibit a strong load dependence. To facilitate comparative analysis between topologies, a mathematical method is presented that characterizes the total energy density utilization of fly capacitors throughout a converter, accounting for large voltage ripple and iii highly nonlinear reverse-bias transitions. This analysis assists with optimal topology selection as energy density utilization directly dictates the required capacitor volume at a specified power level and switching frequency. An expanded family of fly capacitor networks is then introduced in Chapter 6; here it is shown that there are a large number of unexplored yet practical fly capacitor configurations that are eligible for use in hybridized converters. It is calculated that a 6-7 % reduction in capacitor volume can be achieved relative to conventional Dickson fly capacitor networks, while preserving the desirable characteristic of equal voltage ripple on its branches. N-phase and split-phase switching methods and their respective trade-offs are then discussed in detail, offering control techniques that allow a departure from conventional two-phase operation while retaining high-efficiency zero-voltage and zero-current switching (ZVS/ZCS) conditions. A Cockcroft-Walton prototype demonstrates both methods implemented on the same piece of hardware, significantly improving the efficiency range with respect to load and resulting in a state-of-the-art power density of 483.3 kW/liter (7, 920W/inch3). Next, a method termed "resonant charge redistribution" (RCR) is proposed that greatly reduces output capacitance (C[subscript OSS]) related switching losses in all switches of a complex switched-capacitor network. Despite little effort being put towards optimization, a prototype using RCR measures a 61 % reduction in total losses at light load for a near negligible 0.74 % increase in total solution volume. Lastly, resonant gate drive techniques are discussed. Here, within a proposed resonant gate-driver topology, a capacitive decoupling technique is demonstrated that allows power to be delivered to a "flying" high-side N-channel device which commutes between two variable voltages. The implemented prototype achieves up to a 72 % reduction in gating loss when switching over 20 MHz and with rise/fall times ≤ 7 ns. Combining several of the novel techniques described herein can result in near complete mitigation of all primary switching loss mechanisms observed throughout the complex structure of a switched-capacitor converter network. This relatively new field of hybridized converter design has already yielded converters with record-breaking performance, as is demonstrated here. With contemporary techniques, including those described in this work, the field of power electronics is on the cusp of seeing widespread dramatic improvements in energy handling capability, power density, specific power and efficiency at reduced cost, with huge potential for growth and improved energy consumption in both developed and emerging markets.




Reconfigurable Switched-Capacitor Power Converters


Book Description

This book provides readers specializing in ultra-low power supply design for self-powered applications an invaluable reference on reconfigurable switched capacitor power converters. Readers will benefit from a comprehensive introduction to the design of robust power supplies for energy harvesting and self-power applications, focusing on the use of reconfigurable switched capacitor based DC-DC converters, which is ideal for such applications. Coverage includes all aspects of switched capacitor power supply designs, from fundamentals, to reconfigurable power stages, and sophisticated controller designs.




On-chip Buck-boost Switched-capacitor DC-DC Converter


Book Description

The increasing integration level of CMOS integrated circuits (ICs) poses significant challenges for the power delivery network. Multiple independent power domains, each of them individually adjustable, are desirable for complex ICs to optimize the tradeoff between performance and energy consumption. A two-stage power management system, in which a first-stage global converter with a large down conversion ratio is followed by multiple second-stage local regulators for different power domains, fits well in modern power delivery networks. The first stage can be built with conventional, fully optimized DC-DC converters, while the second stage requires flexible, high-density, and high-efficiency on-chip DC-DC converters. With the enhanced fabrication capability of high-density on-chip capacitors, the switched-capacitor (SC) DC-DC converter becomes a perfect candidate for these second-stage on-chip regulators. This dissertation presents the architecture, modeling and design techniques for the development of fully integrated on-chip SC DC-DC converters for the purpose of local regulation. The proposed converter can step up or down the voltage based on the output requirement and circuit performance. Using the unit cell array approach, conversion ratios of n/(n+1) with buck configurations and (n+1)/n with boost configurations are achievable when n cells are grouped as a single converter. Thus, adequate topologies exist to provide a large range of output voltage with high efficiency. A prototype chip with 204 unit cells and nine different finely spaced buck and boost topologies was designed and fabricated in a 45nm bulk CMOS technology. The input is 1V, and the output ranges from 0.58V to 1.3V. The SC converter achieves a peak efficiency of 82.2% at a maximum power density of 0.16W/mm2. Furthermore, the efficiency varies by only 4.2% over the output voltage range. A digital algorithm for closed loop control was implemented in a field-programmable gate array (FPGA) to demonstrate that performance regulation using this type of converter can match circuit performance requirements and compensate for operating conditions or process variations. This dissertation also projects the potential improvements in SC converters with more advanced technology nodes as well as capacitor density scaling, such as using special on-chip capacitor processes like Metal-Insulator-Metal (MIM) capacitors and deep trench capacitors.




A Two-stage Piezoelectric Resonator and Switched Capacitor DC-DC Converter


Book Description

Power converters are used in virtually every area of our lives from electric vehicle charging stations to television screens. Presently, magnetics pose a challenge for miniaturization as they fundamentally decrease in achievable power density at small scales. Our solution to this problem is to remove magnetic components altogether and instead design power converters based on piezoelectric resonators (PRs) and capacitors as the main passive elements. In previous work, we have demonstrated that PRs have high efficiencies and power density capabilities operating as dc-dc voltage regulators, but that these advantages wane for high step down ratios. Alternatively, utilizing capacitors in a switch capacitor (SC) network can provide high step down ratios with high power densities and efficiencies, but only for specific conversion ratios. By connecting the PR and SC converters together, there is an opportunity for each stage to address the drawbacks of the other in order to create a high power density and high efficiency power converter that can provide good voltage regulation and a high step down ratio. The purpose of this thesis is to investigate, simulate, and build a two-stage converter using a piezoelectric resonator and switched capacitor converter.







Design and Control of High-density DC-DC Coverters for Cell Balancing and Low-voltage Power Delivery Application


Book Description

In a variety of applications spanning mobile devices, performance computing, and even renewable energy and automotive, power management and power delivery are an increasing bottleneck in reducing size and cost, improving reliability, and even increasing performance. For example, conventional DC-DC converters rely on magnetic components (inductors and transformers) to efficiently process and transfer energy among different voltage levels. However, while active semiconductor devices have benefited from exponential scaling for many decades (i.e. Moore’s Law), many modern dc-dc converters, particularly highly integrated and high-frequency designs, struggle with the size of magnetic components and the lack of efficient magnetic materials at high switching frequencies. Switched-capacitor dc-dc converters hold the promise to completely eliminate magnetic components in dc-dc converters and can even outperform conventional magneticbased topologies over a wide range of power and voltage levels. Despite the many attractive features of switched-capacitor converters, especially for on-chip power conversion, SC converters are limited by charge sharing losses are therefore not able to access a large portion of the energy density of the capacitors. An argument can be made that the high efficiency and power-density of the best designs has resulted from expensive and not readily available high-density capacitors (i.e. Deep Trench), and high-end deep-submicron semiconductor processes (e.g. SOI) with low parasitic capacitance. A further challenge is the ability to regulate the output voltage. Commonly used linear regulation modes can limit power density or severely hurt efficiency if used over a wide range of output voltage. This thesis explores resonant-switched capacitor converters (ReSC) which leverage a small magnetic component to improve efficiency and power density of switched capacitor converters. Compared to conventional magnetic converters, ReSC converters can operate with high efficiency even with very small values of inductance by leveraging resonance with the flying capacitors. Here an integrated circuit prototype demonstrates operation with 1.1 nH inductors delivering 7.7Wwith 85%efficiency. Importantly, the addition of a small magnetic component offers paths towards new control strategies and modes of operation, which are explored in a 12 V to 3.7 V ReSC IC that demonstrated closed loop regulation. A discrete flying capacitor multilevel converter is then presented which demonstrates all possible operating modes including resonant, quasi-resonant and inductive in combination with continuous and discontinuous conduction. Additional control work revolves around highly granular power management based on partial power processing ladder converters. Discrete prototypes that showcase new control strategies for photovoltaic power generation and microprocessor power delivery are presented.




Miniaturized, Low-voltage Power Converters with Fast Dynamic Response


Book Description

This thesis introduces a two-stage architecture that combines the strengths of switched capacitor (SC) techniques (small size, light-load performance) with the high efficiency and regulation capability of switch-mode power converters. The resulting designs have a superior efficient-power density trade-off over traditional designs. These power converters can provide numerous lowvoltage outputs over a wide input voltage range with a very fast dynamic response, which are ideal for powering logic devices in the mobile and high-performance computing markets. Both design and fabrication considerations for power converters using this architecture are addressed. The results are demonstrated in a 2.4 W dc-dc converter implemented in a 180 nm CMOS IC process and co-packaged with its passive components for high-performance. The converter operates from an input voltage of 2.7 V to 5.5 V with an output voltage of /= 1.2 V, and achieves a 2210 W/inch3 power density with /= 80% efficiency.




Design Techniques for Fully Integrated Switched-Capacitor Voltage Regulators


Book Description

As parallelism increases the number of cores integrated onto a chip, there is a clear need for fully integrated DC-DC converters to enable efficient on-die power management. Due to the availability of high density and low series resistance capacitors in existing CMOS processes, switched-capacitor DC-DC converters have recently gained significant interest as a cost-effective means of enabling such power management functionality. In this thesis, described are design techniques to implement fully integrated switched-capacitor DC-DC converters with high power density and efficiency. The area required by a fully integrated switched-capacitor DC-DC converter in order to deliver a certain level of power to the load has direct implications on both cost and efficiency, and hence in Chapter 2 a methodology is presented to predict and minimize the losses of such a converter operating at a given power density. Chapter 3 further introduces gate driver and level shifter circuit design strategies to enable topology reconfiguration and hence efficient generation of a wider range of output voltages. In order to demonstrate the possibility of replacing all off-chip PMICs, Chapter 4 presents a battery-connected switched-capacitor DC-DC converter that is able to convert the wide input voltage range from Li-ion battery to an output regulated at ~1V using cascode switches and intermediate voltage rails. The SC converter in Chapter 4 also employs a fast control loop to regulate the output with sub-ns response times. Measured results from the converters presented in Chapters 3 and 4 match with the analytical prediction and, thus, confirm the design methodology presented in Chapter 2. The 32nm SOI prototype presented in Chapter 3 achieves ~80% efficiency at a power density of ~0.5-1W/mm2 for a 2:1 step-down converter operating from a 2V input and utilizing only standard MOS capacitors. Reconfiguration of the converter's topology enables it to maintain greater than 70% efficiency for most of the output voltage range from 0.7V to ~1.15V. The 65nm Bulk CMOS prototype discussed in Chapter 4 also utilizes only standard MOS capacitors to regulate the output voltage at ~1V from a ~2.9V-4V input. It achieves ~73% efficiency at 0.19 W/mm2 output power density and maintain efficiency above 72% over the whole range of target power density. The sub-ns response control loop maintains