Microwave Field Effect Transistor Development


Book Description

The purpose of the program was to fabricate a 10-watt F-Band field effect transistor. Two approaches were taken. The multiple mask approach was found to be cumbersome and generally difficult to execute for a 2.5 micron geometry device. Rather than pursue this approach, a second design was initiated which involved self-registration of the source and drain with respect to the gate by means of a selective epitaxial region which comprises the electrical channel. Due to several unanticipated process difficulties (for which solutions have been identified) time did not allow for completion of the fabrication portion of the FET-11 effort. Preliminary findings indicate that the approach is feasible and should be expected to yield microwave power field effect transistors. (Author).




Microwave Field-effect Transistors


Book Description




Microwave Field-effect Transistors


Book Description




Microwave Field Effect Transistor Development


Book Description

HE DEVELOPMENT OF A GALLIUM ARSENIDE Schottky barrier gate field effect transistor to deliver power at microwave frequencies. The program achieved 1.2 watts of saturated power at 3.0 GHz with six small (500 micrometers wide) devices wired in parallel on a single chip carrier. The small signal gain of individual devices at this frequency was as high as 10 dB with cut off frequencies of 10 GHz. A 5 dB gain at 3 GHz with 800 milliwatts of output power was achieved with 6 devices in parallel. Measurements were made of intermodulation products showing -23 dB third order IMP at small signal levels which is a typical result for devices that have not been optimized for low harmonic distortion. A mercury probe was developed for the rapid evaluation of expitaxial material for FET fabrication. (Modified author abstract).




High Power Microwave Field Effect Transistor Development


Book Description

Work is concentrating on gallium arsenide devices rather than silicon to take advantage of the higher mobility. Two fabrication techniques are being used to construct arrays of unit cells on GaAs wafers. The first technique requires realignment of multiple photomasks and has given the best performance but is more costly. The second technique uses only one photomask and the gate is self-aligned between the source and drain metalization. Both unit cells are designed for approximately one watt. The realigned cell has an active length of 1500 microns, and measures about 8 mils by 12 mils. This cell was tested at 3.5 GHz with .6 watts output, 18 db of gain, and 15% efficiency. The efficiency would be much improved in a better test fixture. The self-aligned gate cell has an active length of 2500 microns and measures 12.5 mils by 17 mils. This cell was tested at 4 GHz with one watt of power output, 6 db of gain and 39% drain efficiency or 34.7% overall efficiency.




Modern Microwave Transistors


Book Description

Comprehensive and up-to-date coverage of currently used transistors for commercial and military applications. Authors are recognized experts with previous publications. Updated descriptions of state-of-the-art devices available on Wiley Web site.